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Static timing analysis

Known as: Slow model analysis, Fast model analysis, STA 
Static timing analysis (STA) is a simulation method of computing the expected timing of a digital circuit without requiring a simulation of the full… 
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Papers overview

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Highly Cited
2014
Highly Cited
2014
Probabilistic Timing Analysis (PTA) reduces the amount of information needed to provide tight WCET estimates in real-time systems… 
Highly Cited
2014
Highly Cited
2014
We introduce ROC, a Rank-switching, Open-row Controller for Double Data Rate Dynamic RAM (DDR DRAM). ROC is optimized for mixed… 
Highly Cited
2009
Highly Cited
2009
Variable-latency designs may improve the performance of those circuits in which the worst-case delay paths are infrequently… 
2006
2006
Static timing analysis (STA) techniques allow a designer to check the timing of a circuit at different process corners, which… 
2005
2005
Power supply integrity verification has become a key concern in high performance designs. In deep submicron technologies, power… 
2004
2004
In this paper, we address the problem of signal pruning in static timing analysis (STA). Traditionally, signals are propagated… 
Highly Cited
2002
Highly Cited
2002
Realization of wavelet transform on field-programmable gate array (FPGA) devices for the detection of power system disturbances… 
Highly Cited
2002
Highly Cited
2002
This SoC infrastructure core is a flexible, scalable, and highly accurate embedded time interval analyzer (ETIA), used to measure… 
Highly Cited
1992
Highly Cited
1992
The transition delay of a circuit is examined. It is shown that the transition delay of a circuit can differ from the floating… 
Highly Cited
1990
Highly Cited
1990
Two CAD tools, checkT/sub c/ and minT/sub c/, for timing verification and optimal clocking are introduced. Both tools are based…