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Static timing analysis

Known as: Slow model analysis, Fast model analysis, STA 
Static timing analysis (STA) is a simulation method of computing the expected timing of a digital circuit without requiring a simulation of the full… Expand
Wikipedia

Related topics

Related topics

38 relations
Application-specific integrated circuitCircuit extractionClock signalClock skew
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Broader (1)

Formal methods

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2009
Highly Cited
2009
Static Timing Analysis for Nanometer Designs: A Practical Approach
The book covers topics such as cell timing and power modeling; interconnect modeling and analysis, delay calculation, crosstalk… Expand
Highly Cited
2006
Highly Cited
2006
Timing Analysis of the FlexRay Communication Protocol
FlexRay will very likely become the de-facto standard for in-vehicle communications. However, before it can be successfully used… Expand
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Highly Cited
2003
Highly Cited
2003
Block-based Static Timing Analysis with Uncertainty
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to… Expand
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Highly Cited
1997
Highly Cited
1997
Measurements and analysis of end-to-end Internet dynamics
One of the fundamental difficulties with trying to characterize the Internet''s behavior lies in its immense diversity. To date… Expand
Highly Cited
1994
Highly Cited
1994
Modeling the "Effective capacitance" for the RC interconnect of CMOS gates
With finer line widths and faster switching speeds, the resistance of on-chip metal interconnect is having a dominant impact on… Expand
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Highly Cited
1990
Highly Cited
1990
Asymptotic waveform evaluation for timing analysis
Asymptotic waveform evaluation (AWE) provides a generalized approach to linear RLC circuit response approximations. The RLC… Expand
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Highly Cited
1989
Highly Cited
1989
Distributed fault-tolerant real-time systems: the Mars approach
The authors describe the Maintainable Real-Time System, a fault-tolerant distributed system for process control, developed under… Expand
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Highly Cited
1989
Highly Cited
1989
Static Timing Analysis of Dynamically Sensitizable Paths
This paper describes a new method for solving the false path problem in static timing analysis of acyclic, combinational circuits… Expand
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Highly Cited
1985
Highly Cited
1985
Model for Delay Faults Based upon Paths
Delay testing of combinational logic in a clocked environment is analyzed. A model based upon paths is introduced for delay… Expand
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Highly Cited
1982
Highly Cited
1982
Timing Analysis of Computer Hardware
Timing Analysis is a design automation program that assists computer design engineers in locating problem timing in a clocked… Expand
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