Static timing analysis

Known as: Slow model analysis, Fast model analysis, STA 
Static timing analysis (STA) is a simulation method of computing the expected timing of a digital circuit without requiring a simulation of the full… (More)
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2012
2012
Static cache analysis is an indispensable part of static timing analysis, which is employed to verify the timing behaviour of… (More)
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2006
2006
  • Jens Vygen
  • IEEE Transactions on Computer-Aided Design of…
  • 2006
The notion of slack is central in static timing analysis and very large scale integration (VLSI) design in general. Negative… (More)
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2006
2006
Static timing analysis (STA) techniques allow a designer to check the timing of a circuit at different process corners, which… (More)
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Highly Cited
2003
Highly Cited
2003
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design rrends have led to… (More)
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Highly Cited
2001
Highly Cited
2001
This paper presents a means for estimating parametric timing yield and guiding robust design-for-quality in the presence of… (More)
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2001
2001
This paper presents a novel approach for retargetable static software timing analysis. Specifically, we target the problem of… (More)
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Highly Cited
1997
Highly Cited
1997
This paper examines the problem of statically analyzing the performance of embedded software. This problem is motivated by the… (More)
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Highly Cited
1990
Highly Cited
1990
For digital system designs the propagation delays due to the physical interconnect can have a significant, even dominant, impact… (More)
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Highly Cited
1982
Highly Cited
1982
Timing Analysis is a design automation program that assists computer design engineers in locating problem timing in a clocked… (More)
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