Skip to search formSkip to main contentSkip to account menu

Clock signal

Known as: Central clock, Clock distribution network, Clock distribution netoworks 
In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low… 
Wikipedia (opens in a new tab)

Related topics

Related topics

50 relations
Apollo Guidance ComputerArithmetic logic unitClock gatingClock rate

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2004
Highly Cited
2004
TCAM architecture for IP lookup using prefix properties
In modern IP routers, Internet protocol (IP) lookup forms a bottleneck in packet forwarding because the lookup speed cannot catch… 
Highly Cited
2003
Highly Cited
2003
Parallel 4/spl times/4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264
Transform coding has been widely used in video coding standards. In this paper, a hardware architecture for accelerating… 
Highly Cited
2002
Highly Cited
2002
Dynamic frequency and voltage control for a multiple clock domain microarchitecture
We describe the design, analysis, and performance of an on-line algorithm to dynamically control the frequency/voltage of a… 
Highly Cited
2001
Highly Cited
2001
Reducing power dissipation during test using scan chain disable
A novel approach for minimizing power during scan testing is presented. The idea is that given a full scan module or core that… 
Highly Cited
1999
Highly Cited
1999
Instruction randomization self test for processor cores
Access to embedded processor cores for application of test has greatly complicated the testability of large systems on silicon… 
Highly Cited
1993
Highly Cited
1993
A Software-Optimized Encryption Algorithm
Abstract. We describe the software-efficient encryption algorithm SEAL 3.0. Computational cost on a modern 32-bit processor is… 
Highly Cited
1991
Highly Cited
1991
An entropy coding system for digital HDTV applications
Run-length coding (RLC) and variable-length coding (VLC) are widely used techniques for lossless data compression. A high-speed… 
Highly Cited
1990
Highly Cited
1990
Clock Skew Optimization
  • J. Fishburn
  • IEEE Trans. Computers
  • 1990
  • Corpus ID: 206414387
Improving the performance of a synchronous digital system by adjusting the path delays of the clock signal from the central clock… 
Highly Cited
1990
Highly Cited
1990
Serial interfacing for embedded-memory testing
A serial interfacing scheme in which several embedded memories share the built-in, self-test circuit is presented. For external… 
Highly Cited
1985
Highly Cited
1985
Array processor with multiple broadcasting
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)