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Clock signal
Known as:
Central clock
, Clock distribution network
, Clock distribution netoworks
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In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low…
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Related topics
Related topics
50 relations
Apollo Guidance Computer
Arithmetic logic unit
Clock gating
Clock rate
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2005
Highly Cited
2005
Variability and energy awareness: a microarchitecture-level perspective
Diana Marculescu
,
Emil Talpes
Proceedings - Design Automation Conference
2005
Corpus ID: 840213
This paper proposes microarchitecture-level models for within die (WID) process and system parameter variability that can be…
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Highly Cited
2005
Highly Cited
2005
A time-based energy-efficient analog-to-digital converter
Heemin Y. Yang
IEEE Journal of Solid-State Circuits
2005
Corpus ID: 14457826
Dual-slope converters use time to perform analog-to-digital conversion but require 2/sup N+1/ clock cycles to achieve N bits of…
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Highly Cited
2004
Highly Cited
2004
TCAM architecture for IP lookup using prefix properties
V. Ravikumar
,
R. Mahapatra
IEEE Micro
2004
Corpus ID: 5537457
In modern IP routers, Internet protocol (IP) lookup forms a bottleneck in packet forwarding because the lookup speed cannot catch…
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Highly Cited
2004
Highly Cited
2004
Sleep switch dual threshold Voltage domino logic with reduced standby leakage current
V. Kursun
,
E. Friedman
IEEE Transactions on Very Large Scale Integration…
2004
Corpus ID: 738473
A circuit technique is presented for reducing the subthreshold leakage energy consumption of domino logic circuits. Sleep switch…
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Highly Cited
2003
Highly Cited
2003
Parallel 4/spl times/4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264
Tu-Chih Wang
,
Yu-Wen Huang
,
Hung-Chi Fang
,
Liang-Gee Chen
Proceedings of the International Symposium on…
2003
Corpus ID: 4212838
Transform coding has been widely used in video coding standards. In this paper, a hardware architecture for accelerating…
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Highly Cited
2003
Highly Cited
2003
High-performance and power-efficient CMOS comparators
Chung-Hsun Huang
,
Jinn-Shyan Wang
IEEE J. Solid State Circuits
2003
Corpus ID: 62161155
Several design techniques for high-performance and power-efficient CMOS comparators are proposed. First, the comparator is based…
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Highly Cited
1999
Highly Cited
1999
Formal verification for time-triggered clock synchronization
H. Pfeifer
,
D. Schwier
,
F. V. Henke
Dependable Computing for Critical Applications 7
1999
Corpus ID: 16310583
Distributed dependable real time systems crucially depend on fault tolerant clock synchronization. The paper reports on the…
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Highly Cited
1995
Highly Cited
1995
Clock distribution networks in VLSI circuits and systems
E. Friedman
1995
Corpus ID: 56518393
Any books that you read, no matter how you got the sentences that have been read from the books, surely they will give you…
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Highly Cited
1994
Highly Cited
1994
A 200-MHz quadrature digital synthesizer/mixer in 0.8-/spl mu/m CMOS
L. Tan
,
H. Samueli
Proceedings of IEEE Custom Integrated Circuits…
1994
Corpus ID: 5923780
A 200-MHz quadrature direct digital frequency synthesizer/complex mixer chip is presented. The chip synthesizes sine and cosine…
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Highly Cited
1990
Highly Cited
1990
Serial interfacing for embedded-memory testing
B. Nadeau-Dostie
,
A. Silburt
,
V. Agarwal
IEEE Design & Test of Computers
1990
Corpus ID: 21277283
A serial interfacing scheme in which several embedded memories share the built-in, self-test circuit is presented. For external…
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