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Arithmetic logic unit
Known as:
Arithmetic and logic structures
, Integer operation
, Arithmetic and logic unit
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An arithmetic logic unit (ALU) is a combinational digital electronic circuit that performs arithmetic and bitwise operations on integer binary…
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Related topics
Related topics
50 relations
32-bit
4-bit
Accumulator (computing)
Adder (electronics)
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2008
Highly Cited
2008
Design and Optimization of Reversible BCD Adder/Subtractor Circuit for Quantum and Nanotechnology Based Systems
Majid Mohammadi
,
M. Eshghi
,
M. Haghparast
,
Abbas Bahrololoom
2008
Corpus ID: 14801571
Reversible logic circuits have found emerging attention in nanotechnology, quantum computing and low power CMOS designs. In this…
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2006
2006
The Design of Wireless Sensor Network System Based on ZigBee Technology for Greenhouse
Y. Zhu
,
X. Zhong
,
J. F. Shi
2006
Corpus ID: 108442850
Wireless sensor network is a new research field. It can be used in some special situation for signal collection, processing and…
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Highly Cited
2005
Highly Cited
2005
Incorporating simulation and implementation into teaching computer organization and architecture
B. Hatfield
,
M. Rieker
,
Lan Jin
Proceedings Frontiers in Education 35th Annual…
2005
Corpus ID: 24992292
This paper describes the motivation, the realization, and the experience of incorporating simulation and hardware implementation…
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2004
2004
A DNA Arithmetic Logic Unit
F. D. Santis
,
Gennaro Iaccarino
2004
Corpus ID: 196055665
: - We propose in vitro algorithms using Dna strands to perform arithmetic and logical operations. The salient feature of our…
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2003
2003
The VLSI implementation and evaluation of area-and energy-efficient streaming media processors
W. Dally
,
Brucek Khailany
2003
Corpus ID: 61038605
Media applications such as image processing, signal processing, and graphics require tens to hundreds of billions of arithmetic…
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Highly Cited
1995
Highly Cited
1995
The Codesign of Embedded Systems: A Unified Hardware/Software Representation
Sanjaya Kumar
,
J. Aylor
,
Barry W. Johnson
,
W. Wulf
Springer US
1995
Corpus ID: 43052766
Current practice dictates the separation of the hardware and software development paths early in the design cycle. These paths…
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1995
1995
Algorithmic and architectural enhancements for real-time MPEG-1 decoding on a general purpose RISC workstation
V. Bhaskaran
,
K. Konstantinides
,
R. Lee
,
John P. Beck
IEEE Trans. Circuits Syst. Video Technol.
1995
Corpus ID: 2394434
Traditional video decoders require use of specially designed video decompression processors. We present novel algorithmic and…
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Highly Cited
1985
Highly Cited
1985
Some optimal schemes for ALU implementation in VLSI technology
V. Oklobdzija
,
E. Barnes
IEEE Symposium on Computer Arithmetic
1985
Corpus ID: 18948775
An efficient scheme for carry propagation in an ALU implemented in n-MOS technology is presented. An algorithm that determines…
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Highly Cited
1984
Highly Cited
1984
STAFAN: An Alternative to Fault Simulation
Sunil K. Jain
,
V. Agrawal
Design Automation Conference, Proceedings
1984
Corpus ID: 13209626
STAtistical Fault ANalysis (STAFAN) is proposed as an alternative to fault simulation of digital circuits. In this analysis…
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Highly Cited
1972
Highly Cited
1972
Automatic computation of exponentials, logarithms, ratios and square roots
T. C. Chen
1972
Corpus ID: 6881449
It is shown how a relatively simple device can evaluate exponentials, logarithms, ratios and square roots for fraction arguments…
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