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4-bit

Known as: Four-bit, 4bits, 4 bit 
In computer architecture, 4-bit integers, memory addresses, or other data units are those that are at most 4 bits wide. Also, 4-bit CPU and ALU… 
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Related topics

Related topics

33 relations
74181Arithmetic logic unitAssembly languageBIOS

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Design and Verification of AMBA AHB-Lite protocol using Verilog HDL
—The SOC plan confronts a crevice between generation limit and time to market weights. The outline space develops with changes… 
2016
2016
Spectral Characterization of Iterating Lossy Mappings
In this paper we study what happens to sets when we iteratively apply lossy (round) mappings to them. We describe the information… 
2011
2011
DESIGN OF FULLY DIGITAL CONTROLLED RECONFIGURABLE DUAL-BEAM CONCENTRIC RING ARRAY ANTENNA USING GRAVITATIONAL SEARCH ALGORITHM
In this paper, we propose an optimization method based on Gravitational Search Algorithm (GSA) for design of reconflgurable dual… 
2011
2011
Efficient realization of reconfigurable FIR filter using the new coefficient representation
In this paper, efficient reconfigurable finite-impulse response (FIR) filter architecture is presented based on a new coefficient… 
2004
2004
Efficient and High-Speed FPGA-based String Matching for Packet Inspection
High speed and always-on network access is becoming commonplace around the world, creating a demand for increased network… 
2003
2003
A novel high-speed counter with counting rate independent of the counter's length
Counters are among the basic blocks in every digital system. We propose a novel high-speed counter with a constant counting rate… 
Highly Cited
2003
Highly Cited
2003
Time-to-voltage converter for on-chip jitter measurement
In this paper, we present the concept and design of a time-to-voltage converter (TVC), and demonstrate its application to on-chip… 
2003
2003
Care bit density and test cube clusters: multi-level compression opportunities
  • Bernd Könemann
  • Proceedings 21st International Conference on…
  • 2003
  • Corpus ID: 17000628
Most of the recently discussed and commercially introduced test stimulus data compression techniques are based on low care bit… 
2002
2002
A 1bit Carry Propagate Free Adder/Subtracter VLSI Using Adiabatic Dynamic CMOS Logic Circuit Technology
– This paper describes a design of a 1bit Carry Propagate Free Adder/Subtracter (CPFA/S) VLSI using the Adiabatic Dynamic CMOS… 
1991
1991
Concurrent Smalltalk on the Message-Driven Processor
Concurrent Smalltalk is the primary language used for programming the J- Machine, a MIMD message-passing computer containing… 
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