Skip to search formSkip to main contentSkip to account menu

4-bit

Known as: Four-bit, 4bits, 4 bit 
In computer architecture, 4-bit integers, memory addresses, or other data units are those that are at most 4 bits wide. Also, 4-bit CPU and ALU… 
Wikipedia (opens in a new tab)

Related topics

Related topics

33 relations
74181Arithmetic logic unitAssembly languageBIOS

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
32-BIT MAC UNIT DESIGN USING VEDIC MULTIPLIER
This paper presents Multiply and Accumulate (MAC) unit design using Vedic Multiplier, which is based on Urdhva Tiryagbhyam Sutra… 
2012
2012
Dithered Belief Propagation Decoding
We introduce two dithered belief propagation decoding algorithms to lower the error floor with a minimal hardware overhead. One… 
2011
2011
A NOVEL DESIGN OF REVERSIBLE SERIAL AND PARALLEL ADDER/SUBTRACTOR
Under ideal conditions, Reversible logic gates produce zero power dissipation. So these can be used for low power VLSI design… 
2010
2010
An Area-Efficient and Low-Power Multirate Decoder for Quasi-Cyclic Low-Density Parity-Check Codes
The quasi-cyclic low-density parity-check (QC-LDPC) codes are widely applied in digital broadcast and communication systems… 
2009
2009
A Trust Based Cross Layer Security Protocol for Mobile Ad hoc Networks
In this paper, we develop a trust based security protocol based on a cross layer approach which attains confidentiality and… 
2005
2005
Numerical precision requirements on the multiband ultra-wideband system for practical consumer electronic devices
This paper discusses the requirements on the numerical precision for a practical multiband ultra-wideband (UWB) consumer… 
Review
2002
Review
2002
On-chip inductance cons and pros
  • Y. Ismail
  • IEEE Transactions on Very Large Scale Integration…
  • 2002
  • Corpus ID: 6560683
Provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and… 
1999
1999
The influence of quantization and fixed point arithmetic upon the BER performance of turbo codes
The majority of the performance studies of turbo codes presented in the literature to date have assumed the use of floating point… 
1997
1997
Functional modeling of RSFQ circuits using Verilog HDL
Circuit level simulation is too slow to be used for verification of function and timing of large RSFQ circuits. The alternative… 
Highly Cited
1996
Highly Cited
1996
A low oversampling ratio 14-b 500-kHz ΔΣ ADC with a self-calibrated multibit DAC
Delta-sigma (/spl Delta//spl Sigma/) analog-to-digital converters (ADC's) rely on oversampling to achieve high-resolution. By… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)