Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 225,168,518 papers from all fields of science
Search
Sign In
Create Free Account
74181
Known as:
'181
, 74S181
The 74181 is a bit slice arithmetic logic unit (ALU), implemented as a 7400 series TTL integrated circuit. The first complete ALU on a single chip…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
25 relations
16-bit
4-bit
7400 series
AND gate
Expand
Broader (1)
History of computing hardware
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Designing of Standard Cell Library for GBONOR Approach
V. Sharma
International Conference on Advanced Computing…
2019
Corpus ID: 214624044
Ground bounce noise reduction (GBONOR) approach is a transistor level ground bounce noise (GBN) reduction power gating technique…
Expand
2016
2016
Design of Low Leakage Variability Aware ONOFIC CMOS Standard Cell Library
V. Sharma
,
M. Pattanaik
J. Circuits Syst. Comput.
2016
Corpus ID: 29584014
In this research paper, a minimum set of low leakage variability aware ONOFIC CMOS digital standard cell library is developed…
Expand
2011
2011
Impact of logic synthesis on soft error vulnerability using a 90-nm bulk CMOS digital cell library
D. Limbrick
,
D. Black
,
+5 authors
A. Witulski
Proceedings of IEEE Southeastcon
2011
Corpus ID: 1471419
Reliability-aware logic synthesis can be used to mitigate a circuit's response to radiation-induced soft errors. This paper…
Expand
2007
2007
Aus Forschung, Wirtschaft und Betrieb
K. Sorg
Holz als Roh- und Werkstoff
2007
Corpus ID: 414883
A b e t z , I ' .: Sind kurzfr is t ige Z uwachs r eak t i onen an j ungen F ich ten naeh einer I )u rchfo r s tung meI3bar…
Expand
2006
2006
Independence Fault Collapsing and Concurrent Test Generation
Alok S. Doshi
2006
Corpus ID: 16514999
Except where reference is made to the work of others, the work described in this thesis is my own or was done in collaboration…
Expand
2005
2005
INDEPENDENCE FAULT COLLAPSING
Alok S. Doshi
,
V. Agrawal
2005
Corpus ID: 16959461
This paper introduces independence fault collapsing. Faults are grouped into independent fault subsets such that each subset has…
Expand
2004
2004
Fault Collapsing
Lou Yuanlin
,
Xu Gefu
2004
Corpus ID: 16013178
Fault collapsing is a very important approach to reduce overlapped stuck at faults and then generate effective faults in a…
Expand
2003
2003
Fearless Speech in the Killing State: The Power of Capital Crime Victim Speech
Jonathan D. Simon
2003
Corpus ID: 54080810
INTROD U CTION ..................................................................................... 1377 I. THE RISE OF THE…
Expand
1997
1997
Incorporating IDDQ Testing with BIST for Improved Coverage: An Experimental Study
W. Weber
,
A. Singh
Journal of electronic testing
1997
Corpus ID: 21119079
In this paper we present an experimental study on the effectivenessof incorporating at-speed IDDQ testing with traditionalBIST…
Expand
1995
1995
An experimental evaluation of the differential BICS for I/sub DDQ/ testing
W. Weber
,
A. Singh
Proceedings of the ... IEEE VLSI Test Symposium
1995
Corpus ID: 36631475
In this paper we present an experimental study on the effectiveness of I/sub DDQ/ testing using the differential built-in current…
Expand
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE