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16-bit
Known as:
16 bit application
, 64k barrier
, 16-bit architecture
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In computer architecture, 16-bit integers, memory addresses, or other data units are those that are at most 16 bits (2 octets) wide. Also, 16-bit CPU…
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Related topics
Related topics
50 relations
32-bit
86-DOS
AVR32
Apollo Guidance Computer
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2011
Highly Cited
2011
Performance evaluation of the fractional wavelet filter: A low-memory image wavelet transform for multimedia sensor networks
Stephan Rein
,
M. Reisslein
Ad hoc networks
2011
Corpus ID: 18016299
Highly Cited
2010
Highly Cited
2010
Design of High-speed Modified Booth Multipliers Operating at GHz Ranges
Soojin Kim
,
Kyeongsoon Cho
2010
Corpus ID: 17071803
— This paper describes the pipeline architecture of high-speed modified Booth multipliers. The proposed multiplier circuits are…
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2006
2006
On denoising and compression of DNA microarray images
D. Adjeroh
,
Yong Zhang
,
Rahul Parthe
Pattern Recognition
2006
Corpus ID: 10872881
2002
2002
Designing self-checking FPGAs through error detection codes
C. Bolchini
,
F. Salice
,
D. Sciuto
17th IEEE International Symposium on Defect and…
2002
Corpus ID: 30101490
Presents an approach for adapting sound techniques for designing Totally Self-Checking (TSC) combinational circuits based on…
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Highly Cited
2000
Highly Cited
2000
ON THE MATCHING ACCURACY OF RASTERISED SCANNING LASER ALTIMETER DATA
A. Behan
2000
Corpus ID: 56196962
For certain applications irregularly distributed scanning laser altimeter data need to be rasterised - such as for use in GIS…
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Highly Cited
1999
Highly Cited
1999
Behavioral Specification of Distributed Software Component Interfaces
Cynthia Della Torre Cicalese
,
S. Rotenstreich
Computer
1999
Corpus ID: 13859238
Networked computers are finding their way into a broader range of environments, from corporate offices to schools, homes, and…
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1997
1997
Dynamic operand interchange for low power
Taekyoon Ahn
,
Kiyoung Choi
1997
Corpus ID: 14650262
Power consumption of an execution unit can be reduced by interchanging its two input operands. A dynamic operand interchange…
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1994
1994
Design of a new squaring function for the Viterbi algorithm
A. Eshraghi
,
T. Fiez
,
K. Winters
,
T. Fischer
IEEE J. Solid State Circuits
1994
Corpus ID: 62691708
An approximate squaring method has been developed for the Viterbi algorithm that is faster and more area efficient than…
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Highly Cited
1990
Highly Cited
1990
Robustness enhancement of DC drives with a smooth optimal sliding mode control
J. Zhang
,
T. H. Barton
Conference Record of the IEEE Industry…
1990
Corpus ID: 16752803
A quantitative analysis of the robustness of a DC drive control system is attempted. The time-domain expressions of the transient…
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Highly Cited
1980
Highly Cited
1980
A Microprocessor-Controlled Fast-Response Speed Regulator with Dual Mode Current Loop for DCM Drives
T. Ohmae
,
T. Matsuda
,
Toshitaka Suzuki
,
N. Azusawa
,
K. Kamiyama
,
T. Konishi
IEEE transactions on industry applications
1980
Corpus ID: 16316290
A new control method is described in which a microprocessor is used to regulate the speed of a dc motor driven by antiparallel…
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