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Clock rate
Known as:
Core speed
, Clock frequencies
, CPU clock rate
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The clock rate typically refers to the frequency at which a chip like a central processing unit (CPU), one core of a multi-core processor, is running…
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Related topics
Related topics
50 relations
AMD Turbo Core
ARM architecture
Apollo Guidance Computer
Arkanoid
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Broader (1)
Clock signal
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
Fuel Cell Current Ripple Mitigation by Interleaved Technique for High Power Applications
P. Thounthong
,
P. Sethakul
,
S. Raël
,
B. Davat
Annual Meeting of the IEEE Industry Applications…
2009
Corpus ID: 15171329
This paper presents a fuel cell (FC) current ripple mitigation by interleaved algorithm for high power dc distributed system…
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Highly Cited
2006
Highly Cited
2006
Direct Digital Synthesizer With Sine-Weighted DAC at 32-GHz Clock Frequency in InP DHBT Technology
S. E. Turner
,
D. Kotecki
IEEE Journal of Solid-State Circuits
2006
Corpus ID: 19595636
A direct digital synthesizer (DDS) implemented in InP double heterojunction bipolar transistor (DHBT) technology is reported…
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Highly Cited
2006
Highly Cited
2006
A 40GOPS 250mW massively parallel processor based on matrix architecture
M. Nakajima
,
H. Noda
,
+9 authors
Toru Shimizu
IEEE International Solid-State Circuits…
2006
Corpus ID: 3209046
The matrix processing engine (MTX) is a massively parallel processor based on the matrix architecture. 40GOPS (16b additions) is…
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Highly Cited
2004
Highly Cited
2004
Minimum and maximum utilization bounds for multiprocessor rate monotonic scheduling
J. M. López
,
J. L. Díaz
,
D. F. García
IEEE Transactions on Parallel and Distributed…
2004
Corpus ID: 825704
The utilization bound for real-time rate monotonic (RM) scheduling on uniprocessors is extended to multiprocessors with…
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Highly Cited
2002
Highly Cited
2002
Active Clamped ZVS Forward Converter With Soft-Switched Synchronous Rectifier
A. Açik
,
I. Çadirci
2002
Corpus ID: 2653204
This paper presents the analysis, design and implementation of an active-clamped, ZVS forward converter equipped with a soft…
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Highly Cited
1998
Highly Cited
1998
A high-speed, low-power clock generator for a microprocessor application
V. V. Kaenel
IEEE J. Solid State Circuits
1998
Corpus ID: 62065896
This paper discusses the design of the clock generator for the Alpha 21264. As the speed performances are of primary concern in…
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Highly Cited
1998
Highly Cited
1998
Quantum rate constants for the H2+OH reaction with the centrifugal sudden approximation
Dong H. Zhang
,
J. Light
,
Soo-Y. Lee
1998
Corpus ID: 19693881
The cumulative reaction probability (CRP) has been calculated for the H2+OH↔H2O+H in its full dimensionality by using the…
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Highly Cited
1993
Highly Cited
1993
Hardware self-tuning and circuit performance monitoring
Ted Kehl
Proceedings of IEEE International Conference on…
1993
Corpus ID: 13083661
Self-tuning is a new clocking methodology borrowing heavily from both the synchronous and self-timed disciplines. A self-tuned…
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Highly Cited
1982
Highly Cited
1982
A synchronous approach for clocking VLSI systems
F. Anceau
IEEE Journal of Solid-State Circuits
1982
Corpus ID: 25559513
Presents a synchronous solution for clocking VLSI systems organized as distributed systems. This solution avoids the drawbacks of…
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Highly Cited
1968
Highly Cited
1968
YAG laser operation by semiconductor laser pumping
M. Ross
1968
Corpus ID: 59197428
Yttrium aluminum garnet (YAG) laser operation has been achieved using a single gallium arsenide laser diode as the pump…
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