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Clock gating

Known as: CG, Gating, Perfect clock gating 
Clock gating is a popular technique used in many synchronous circuits for reducing dynamic power dissipation. Clock gating saves power by adding more… 
Wikipedia

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2013
Highly Cited
2013
This paper presents an ultra-low power batteryless energy harvesting body sensor node (BSN) SoC fabricated in a commercial 130 nm… 
Highly Cited
2011
Highly Cited
2011
Clock gating is one of the power-saving techniques used on the Pentium 4 processor and in next generation processors. To save… 
Highly Cited
2009
Highly Cited
2009
A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power… 
Review
2009
Review
2009
Astrometry can bring powerful constraints to bear on a variety of scientific questions about neutron stars, including their… 
Highly Cited
2007
Highly Cited
2007
This paper analyzes the performance of concurrent (index) scan operations in both record (NSM/PAX) and column (DSM) disk storage… 
Highly Cited
2003
Highly Cited
2003
The performance and power optimization of dynamic superscalar microprocessors requires striking a careful balance between… 
Highly Cited
2001
Highly Cited
2001
The power dissipation of modern processors has been rapidly increasing along with increasing transistor count and clock… 
Highly Cited
2001
Highly Cited
2001
Develops a methodology for selecting and optimizing flip-flops for low-energy systems with constant throughput. Characterization… 
Highly Cited
2000
Highly Cited
2000
This paper models the clock behavior in a sequential circuit by a quaternary variable and uses this representation to propose and…