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Clock gating

Known as: CG, Gating, Perfect clock gating 
Clock gating is a popular technique used in many synchronous circuits for reducing dynamic power dissipation. Clock gating saves power by adding more… 
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Related topics

Related topics

19 relations
AMD 10hAMD Accelerated Processing UnitAsynchronous circuitCPU power dissipation

Broader (1)

Electronic design automation

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Clock Gating for Dynamic Power Reduction in
In this paper clock gating technique is presented for low power VLSI (very large scale integration) circuit design. Clock in… 
2012
2012
Disaster Managers’ Perception of Effective Visual Risk Communication for General Public
Risk communication is one of the measures that should be implemented to increase the awareness and preparedness of the general… 
2011
2011
Optimizing and Applying Graphene as a Saturable Absorber for Generating Ultrashort Pulses
Graphene is a broadband, fast saturable absorber well suited for passive mode-locking of lasers. The broadband absorption, ultra… 
2010
2010
Comparing CλaSH and VHDL by implementing a dataflow processor
As embedded systems are becoming increasingly complex, the design process and verification have become very time-consuming… 
2009
2009
Clock gating effectiveness metrics: Applications to power optimization
Effective implementation and efficient utilization of clock gating logic is a critical element for dynamic power optimization. In… 
2008
2008
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include… 
Review
2008
Review
2008
Clock gating for power optimization in ASIC design cycle theory & practice
In this tutorial we present a comprehensive analysis of the available clock gate (CG) optimization approaches with re-cent… 
2002
2002
Efficient ASIC implementation of a WCDMA Rake Receiver
This thesis is a study of a efficient ASIC implementation of a WCDMA Rake Receiver for the third generation mobile communication… 
2000
2000
Advanced Navigator Techniques
The purpose of this study was to investigate and to optimize the performance of the real-time navigator technology on a clinical… 
1999
1999
Automatic insertion of gated clocks at register transfer level
In synchronous circuits, the clock signal switches at every clock cycle and drives a large capacitance. As a result, the clock… 
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