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Clock gating

Known as: CG, Gating, Perfect clock gating 
Clock gating is a popular technique used in many synchronous circuits for reducing dynamic power dissipation. Clock gating saves power by adding more… 
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Related topics

Related topics

19 relations
AMD 10hAMD Accelerated Processing UnitAsynchronous circuitCPU power dissipation

Broader (1)

Electronic design automation

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Iterative angle-and-time-domain gating technique for time-reversal MUSIC imaging
2014
2014
Computer-aided quantification of contrast agent spatial distribution within atherosclerotic plaque in contrast-enhanced ultrasound image sequences
2013
2013
Clock Gating for Dynamic Power Reduction in
In this paper clock gating technique is presented for low power VLSI (very large scale integration) circuit design. Clock in… 
2010
2010
Area-Efficient Temporally Hardened by Design Flip-Flop Circuits
Two temporally hardened master-slave flip-flops are presented. Both designs utilize master latches containing Muller C-elements… 
2008
2008
Single photon avalanche photodiodes for near-infrared photon counting
InP-based single photon avalanche diodes (SPADs) have proven to be the most practical solution currently available for many… 
2008
2008
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include… 
2004
2004
An electromigration and thermal model of power wires for a priori high-level reliability prediction
In this paper, a simple power-distribution electrothermal model including the interconnect self-heating is used together with a… 
2004
2004
Integrating core selection in the SOC test solution design-flow
  • E. Larsson
  • International Conferce on Test
  • 2004
  • Corpus ID: 10951864
We propose a technique to integrate core selection in the SOC (system-on-chip) test solution design-flow. It can, in contrast to… 
2003
2003
Comparing the Energy Efficiency of CMP and SMT Architectures for Multimedia Workloads
Chip multiprocessing (CMP) and simultaneous multithreading (SMT) are two recently adopted techniques for improving the throughput… 
1999
1999
Numerical Simulation of Laser-Induced Fluorescence Imaging in Shock-Layer Flows
Planar laser-induced fluorescence (PLIF) images of nitric oxide in hypersonic flow over a wedge and a hemisphere are compared… 
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