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Clock gating
Known as:
CG
, Gating
, Perfect clock gating
Clock gating is a popular technique used in many synchronous circuits for reducing dynamic power dissipation. Clock gating saves power by adding more…
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Related topics
Related topics
19 relations
AMD 10h
AMD Accelerated Processing Unit
Asynchronous circuit
CPU power dissipation
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Broader (1)
Electronic design automation
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2013
Highly Cited
2013
A Batteryless 19 $\mu$W MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications
Yanqing Zhang
,
Fan Zhang
,
+10 authors
B. Otis
IEEE Journal of Solid-State Circuits
2013
Corpus ID: 11223717
This paper presents an ultra-low power batteryless energy harvesting body sensor node (BSN) SoC fabricated in a commercial 130 nm…
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Highly Cited
2011
Highly Cited
2011
Clock gating — A power optimizing technique for VLSI circuits
Jitesh R. Shinde
,
S. Salankar
Annual IEEE India Conference
2011
Corpus ID: 22688139
Clock gating is one of the power-saving techniques used on the Pentium 4 processor and in next generation processors. To save…
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Highly Cited
2009
Highly Cited
2009
Ultra Low-Power Clocking Scheme Using Energy Recovery and Clock Gating
H. Mahmoodi
,
V. Tirumalashetty
,
M. Cooke
,
K. Roy
IEEE Transactions on Very Large Scale Integration…
2009
Corpus ID: 835750
A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power…
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Review
2009
Review
2009
PRECISION ASTROMETRY WITH THE VERY LONG BASELINE ARRAY: PARALLAXES AND PROPER MOTIONS FOR 14 PULSARS
S. Chatterjee
,
W. Brisken
,
+7 authors
M. Kramer
2009
Corpus ID: 7264675
Astrometry can bring powerful constraints to bear on a variety of scientific questions about neutron stars, including their…
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Highly Cited
2007
Highly Cited
2007
Cooperative Scans: Dynamic Bandwidth Sharing in a DBMS
M. Zukowski
,
S. Héman
,
N. Nes
,
P. Boncz
VLDB
2007
Corpus ID: 14282128
This paper analyzes the performance of concurrent (index) scan operations in both record (NSM/PAX) and column (DSM) disk storage…
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Highly Cited
2003
Highly Cited
2003
Front-end policies for improved issue efficiency in SMT processors
A. El-Moursy
,
D. Albonesi
The Ninth International Symposium on High…
2003
Corpus ID: 370196
The performance and power optimization of dynamic superscalar microprocessors requires striking a careful balance between…
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Highly Cited
2002
Highly Cited
2002
Openness and extraversion are associated with reduced latent inhibition: replication and commentary
Jordan B. Peterson
,
Kathleen W. Smith
,
S. Carson
2002
Corpus ID: 16751242
Highly Cited
2001
Highly Cited
2001
Managing the Impact of Increasing Microprocessor Power Consumption
S. Gunther
,
F. Binns
,
D. Carmean
2001
Corpus ID: 3076750
The power dissipation of modern processors has been rapidly increasing along with increasing transistor count and clock…
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Highly Cited
2001
Highly Cited
2001
Analysis and design of low-energy flip-flops
D. Markovic
,
B. Nikolić
,
R. Brodersen
ISLPED '01
2001
Corpus ID: 28288719
Develops a methodology for selecting and optimizing flip-flops for low-energy systems with constant throughput. Characterization…
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Highly Cited
2000
Highly Cited
2000
Clock-gating and its application to low power design of sequential circuits
Qing Wu
,
Massoud Pedram
,
Xunwei Wu
2000
Corpus ID: 12518795
This paper models the clock behavior in a sequential circuit by a quaternary variable and uses this representation to propose and…
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