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Asynchronous circuit
Known as:
Vennjunction
, Asynchronous vlsi
, Clockless logic
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An asynchronous circuit, or self-timed circuit, is a sequential digital logic circuit which is not governed by a clock circuit or global clock signal…
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Related topics
Related topics
47 relations
AMULET microprocessor
ARM architecture
Actor model
Adiabatic circuit
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Review
2013
Review
2013
A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems
T. Serrano‐Gotarredona
,
T. Prodromakis
,
B. Linares‐Barranco
IEEE Circuits and Systems Magazine
2013
Corpus ID: 21512204
Recent research in nanotechnology has led to the practical realization of nanoscale devices that behave as memristors, a device…
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Highly Cited
2008
Highly Cited
2008
Multi-Threshold Asynchronous Circuit Design for Ultra-Low Power
Andrew Bailey
,
A. Zahrani
,
Guoyuan Fu
,
J. Di
,
S. Smith
Journal of Low Power Electronics
2008
Corpus ID: 6511673
This paper presents an ultra-low power circuit design methodology which combines the Multi-Threshold CMOS (MTCMOS) technique with…
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Highly Cited
2006
Highly Cited
2006
Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic
Y. Monnet
,
M. Renaudin
,
R. Leveugle
IEEE transactions on computers
2006
Corpus ID: 28003651
This paper presents hardening techniques against fault attacks and the practical evaluation of their efficiency. The circuit…
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Highly Cited
2003
Highly Cited
2003
Balanced self-checking asynchronous logic for smart card applications
S. Moore
,
Ross J. Anderson
,
R. Mullins
,
G. Taylor
,
J. Fournier
Microprocessors and microsystems
2003
Corpus ID: 2186513
2002
2002
Asynchronous maturation of the sexes may limit close inbreeding in a subsocial spider
Todd C. Bukowski
,
L. Avilés
2002
Corpus ID: 54816128
We studied the temporal patterns of maturation and sexual receptivity of a subsocial spider, Anelosimus cf. jucundus, in southern…
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Highly Cited
2001
Highly Cited
2001
Utility-based power control in cellular wireless systems
Mingbo Xiao
,
N. Shroff
,
E. Chong
Proceedings IEEE INFOCOM . Conference on Computer…
2001
Corpus ID: 12262184
Distributed power control algorithms for systems with hard SIR constraints may diverge when infeasibility arises. We present a…
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Highly Cited
2001
Highly Cited
2001
Sequential Optimization of Asynchronous and Synchronous Finite-State Machines: Algorithms and Tools
Robert M. Fuhrer
,
S. Nowick
2001
Corpus ID: 60511858
List of Figures. List of Tables. Acknowledgments. 1. Introduction. 2. Background. 3. Burst-Mode Synthesis Path Walk-Through. 4…
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1999
1999
AMULET3 revealed
J. Garside
,
S. Furber
,
Shiaw-Horng Chung
Proceedings. Fifth International Symposium on…
1999
Corpus ID: 206515603
AMULET3 is the third fully asynchronous implementation of the ARM architecture designed at the University of Manchester. It…
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Highly Cited
1994
Highly Cited
1994
Basic Gate Implementation of Speed-Independendent Circuits
A. Kondratyev
,
M. Kishinevsky
,
Bill Lin
,
P. Vanbekbergen
,
A. Yakovlev
Design Automation Conference
1994
Corpus ID: 10431976
Existing methods for synthesis of speedindependent circuits under unbounded delay model have difficulties in combining the…
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Highly Cited
1988
Highly Cited
1988
Asynchronous hatching and food limitation: a test of Lack's hypothesis
S. Skagen
1988
Corpus ID: 52250105
-Lack's (1954, 1968) hypothesis that asynchronous hatching of altricial birds is an adaptive response to unpredictable food…
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