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Asynchronous circuit

Known as: Vennjunction, Asynchronous vlsi, Clockless logic 
An asynchronous circuit, or self-timed circuit, is a sequential digital logic circuit which is not governed by a clock circuit or global clock signal… 
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Related topics

Related topics

47 relations
AMULET microprocessorARM architectureActor modelAdiabatic circuit

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Review
2013
Review
2013
A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems
Recent research in nanotechnology has led to the practical realization of nanoscale devices that behave as memristors, a device… 
Highly Cited
2008
Highly Cited
2008
Multi-Threshold Asynchronous Circuit Design for Ultra-Low Power
This paper presents an ultra-low power circuit design methodology which combines the Multi-Threshold CMOS (MTCMOS) technique with… 
Highly Cited
2007
Highly Cited
2007
Capacity of multi-channel wireless networks with random (c, f) assignment
With the availability of multiple unlicensed spectral bands, and potential cost-based limitations on the capabilities of… 
Highly Cited
2006
Highly Cited
2006
Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic
This paper presents hardening techniques against fault attacks and the practical evaluation of their efficiency. The circuit… 
2002
2002
Asynchronous maturation of the sexes may limit close inbreeding in a subsocial spider
We studied the temporal patterns of maturation and sexual receptivity of a subsocial spider, Anelosimus cf. jucundus, in southern… 
Highly Cited
2001
Highly Cited
2001
Sequential Optimization of Asynchronous and Synchronous Finite-State Machines: Algorithms and Tools
List of Figures. List of Tables. Acknowledgments. 1. Introduction. 2. Background. 3. Burst-Mode Synthesis Path Walk-Through. 4… 
1999
1999
AMULET3 revealed
AMULET3 is the third fully asynchronous implementation of the ARM architecture designed at the University of Manchester. It… 
Highly Cited
1994
Highly Cited
1994
Basic Gate Implementation of Speed-Independendent Circuits
Existing methods for synthesis of speedindependent circuits under unbounded delay model have difficulties in combining the… 
1994
1994
Synthesis Of Hazard-free Multi-level Logic Under Multiple-input Changes From Binary Decision Diagrams
We describe a new method for directly synthesizing a hazard-free multilevel logic implementation from a given logic specification… 
Highly Cited
1988
Highly Cited
1988
Asynchronous hatching and food limitation: a test of Lack's hypothesis
-Lack's (1954, 1968) hypothesis that asynchronous hatching of altricial birds is an adaptive response to unpredictable food… 
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