Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 228,398,464 papers from all fields of science
Search
Sign In
Create Free Account
Clock skew
Known as:
Clock shear
, Skew
, Timing skew
The operation of most digital circuit systems, such as computer systems, is synchronized by a periodic signal known as a "clock" that dictates the…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
24 relations
Clock drift
Clock signal
Combinational logic
Computer
Expand
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2008
2008
Type-matching clock tree for zero skew clock gating
Chia-Ming Chang
,
Shih-Hsu Huang
,
Yuan-Kai Ho
,
Jia-Zong Lin
,
Hsin-Po Wang
,
Yu-Sheng Lu
45th ACM/IEEE Design Automation Conference
2008
Corpus ID: 1385207
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include…
Expand
2005
2005
Time-delay optimization of RSFQ cells
S. Intiso
,
I. Kataeva
,
E. Tolkacheva
,
Henrik Engseth
,
K. Platov
,
A. Kidiyarova-Shevchenko
IEEE transactions on applied superconductivity
2005
Corpus ID: 44452463
This paper presents timing models for RSFQ cells, based on conventional finite-state machines description. Models have been…
Expand
2004
2004
Fast feedthrough logic: a high performance logic family for GaAs
S. Nooshabadi
,
J. Montiel-Nelson
IEEE Transactions on Circuits and Systems Part 1…
2004
Corpus ID: 151485
A GaAs dynamic logic family using the feedthrough evaluation concept is presented in this paper. Feedthrough logic (FTL) allows…
Expand
Highly Cited
2002
Highly Cited
2002
Diagnosis of sequence-dependent chips
C. Li
,
E. McCluskey
Proceedings 20th IEEE VLSI Test Symposium (VTS )
2002
Corpus ID: 31910146
A technique capable of diagnosing single and multiple stuck-open and stuck-at faults is presented. Eleven sequence-dependent…
Expand
Review
2002
Review
2002
On-chip inductance cons and pros
Y. Ismail
IEEE Transactions on Very Large Scale Integration…
2002
Corpus ID: 6560683
Provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and…
Expand
Highly Cited
2002
Highly Cited
2002
Power supply noise suppression via clock skew scheduling
Wai-Ching Douglas Lam
,
Cheng-Kok Koh
,
C. Tsao
Proceedings International Symposium on Quality…
2002
Corpus ID: 7145508
Simultaneous switching events in the clock lines and the signals passing through sequential and combinational logic elements…
Expand
Highly Cited
2001
Highly Cited
2001
Statistical clock skew modeling with data delay variations
D. Harris
,
S. Naffziger
IEEE Transactions on Very Large Scale Integration…
2001
Corpus ID: 8905820
Accurate clock skew budgets are important for microprocessor designers to avoid hold-time failures and to properly allocate…
Expand
1999
1999
Timing analysis including clock skew
D. Harris
,
M. Horowitz
,
Dean Liu
IEEE Trans. Comput. Aided Des. Integr. Circuits…
1999
Corpus ID: 6282895
Clock skew is an increasing concern for high-speed circuit designers. Circuit designers use transparent latches and skew-tolerant…
Expand
1988
1988
Understanding Clock Skew in Synchronous Systems
M. Hatamian
1988
Corpus ID: 59679767
Clock distribution and synchronization in synchronous systems are important issues especially as the size of the system and/or…
Expand
Highly Cited
1986
Highly Cited
1986
Elimination of process-dependent clock skew in CMOS VLSI
M. Shoji
1986
Corpus ID: 62734278
Delays of two clock signals propagating along their respective CMOS logic circuit paths can be matched against all processing…
Expand
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE