Skip to search formSkip to main contentSkip to account menu

Source-synchronous

Known as: Source synchronous, Source syncronous 
Source-Synchronous clocking refers to a technique used for timing symbols on a digital interface. Specifically, it refers to the technique of having… 
Wikipedia (opens in a new tab)

Related topics

Related topics

10 relations
Clock recoveryHyperTransportItaniumMedia-independent interface

Broader (1)

Clock signal

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
A Wideband Injection Locked Quadrature Clock Generation and Distribution Technique for an Energy-Proportional 16–32 Gb/s Optical Receiver in 28 nm FDSOI CMOS
We present a novel frequency tracking method that exploits the dynamics of injection locking in a quadrature ring oscillator to… 
2013
2013
A 100+ Meter 12 Gb/s/Lane Copper Cable Link Based on Clock-Forwarding
Active and passive copper cables for data rates exceeding 10 Gb/s are typically limited to less than 20 m. Optical fiber on the… 
2011
2011
Design of a 12Gb/s transceiver for high-density links with discontinuities using modal signaling
In high-speed chip-to-chip single-ended signaling links, far-end crosstalk presents one of the dominant noise sources, limiting… 
2011
2011
Moodle-integrated open source synchronous teaching
It is well understood that the two prevalent approaches to distance education, synchronous and asynchronous, can be combined to… 
2010
2010
Performance Analysis of On-Chip Communication Structures under Device Variability
On-chip communication is becoming an important bottleneck in the design and operation of high performance systems where it has to… 
2009
2009
Estimating reliability and throughput of source-synchronous wave-pipelined interconnect
Wave pipelining has gained attention for NoC interconnect by its promise of high bandwidth using simple circuits. Reliability… 
2007
2007
High-speed source-synchronous interface for the IBM System z9 processor
As mainframes evolve and deliver higher performance, technologists are focusing less on processor speed and more on overall… 
2006
2006
A Sub-Picosecond Resolution 0.5-1.5GHz Digital-to-Phase Converter
A digital-to-phase converter operating from 0.5-1.5GHz employs oversampling, noise shaping and DLL phase filtering to achieve sub… 
Review
2002
Review
2002
Electrical modeling of high-speed source synchronous communication
The basic electrical package modeling issues for source synchronous communication are discussed, and modeling techniques are… 
1999
1999
DDR-SDRAM, HIGH-SPEED, SOURCE-SYNCHRONOUS INTERFACES CREATE DESIGN CHALLENGES
With source-synchronous interfaces, data and clock transport from a transmitter to a receiver, and the receiver interface uses… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)