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Clock recovery

Known as: CDR, Clock and data recovery, Clock/data recovery 
Some digital data streams, especially high-speed serial data streams (such as the raw stream of data from the magnetic head of a disk drive and… Expand
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Papers overview

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Highly Cited
2008
Highly Cited
2008
A hybrid analog-digital quarter-rate clock and data recovery circuit (CDR) that achieves a wide-tracking range and excellent… Expand
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Highly Cited
2007
Highly Cited
2007
Two equalizer filter topologies and a merged equalizer/CDR circuit are described that operate at 10 Gb/s in 0.13-mum CMOS… Expand
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Highly Cited
2007
Highly Cited
2007
A DSP-based low-power 12.5Gb/s SerDes using a baud-rate ADC and a digital data-path is developed for backplane data communication… Expand
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Highly Cited
2004
Highly Cited
2004
A large-signal piecewise-linear model is proposed for bang-bang phase detectors that predicts characteristics of clock and data… Expand
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Highly Cited
2003
Highly Cited
2003
A phase-locked clock and data recovery circuit incorporates a multiphase LC oscillator and a quarter-rate bang-bang phase… Expand
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Highly Cited
2003
Highly Cited
2003
A backplane transceiver uses a folded 5-tap TX equalizer and 5-tap RX equalizer to counteract losses and reflections. A flexible… Expand
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1997
1997
A CMOS clock and data recovery PLL is described for serial nonreturn-to-zero (NRZ) data transmission. The voltage controlled… Expand
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Highly Cited
1985
Highly Cited
1985
  • C Hogge
  • IEEE Transactions on Electron Devices
  • 1985
  • Corpus ID: 12361542
Conventional approaches to the problem of extracting clock from NRZ data do not automatically hold the clock in the center of the… Expand
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Highly Cited
1976
Highly Cited
1976
Adaptive equalizers are usually realized in the form of a transversal filter with variable tap gains and tap spacing equal to the… Expand
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Highly Cited
1975
Highly Cited
1975
A circuit for detecting timing errors between a binary signal and a local clock pulse generator is described. Three binary… Expand
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