Burst mode clock and data recovery

Known as: BM-CDR 
The passive optical network (PON) uses tree-like network topology. Due to the topology of PON, the transmission modes for downstream (that is, from… (More)
Wikipedia

Topic mentions per year

Topic mentions per year

1969-2017
051019692017

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
A burst mode clock and data recovery (BMCDR) circuit for 10 Gbps passive optical network (10G-PON) is presented. The proposed… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • table I
Is this relevant?
2013
2013
A 10Gbps, 1/5-rate burst mode clock and data recovery (BMCDR) circuit is proposed. The BMCDR is reconfigurable between data… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Is this relevant?
2012
2012
A 1/7 rate, burst mode clock and data recovery circuit incorporating with demultiplexer is proposed. It covers 622 Mbps to 7 Gbps… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 8
Is this relevant?
2010
2010
In this paper, we demonstrate a 5/10-Gb/s burst-mode clock and data recovery circuit (BM-CDR) for passive optical network (PON… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • table I
Is this relevant?
2008
2008
A 20-Gb/s clock and data recovery circuit incorporates injection-locking technique to achieve high-speed operation with low power… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Is this relevant?
2006
2006
This paper describes the design of a 0.625-3.125 Gbps, burst mode clock and data recovery circuit in a 0.18 mum CMOS process. A… (More)
  • figure 1
  • figure 3
  • figure 2
  • figure 5
  • figure 4
Is this relevant?
2006
2006
Broad-band phase-locked loops (PLLs) are proposed for burst-mode clock and data recovery in optical multiaccess networks. Design… (More)
  • figure 1
  • table I
  • figure 3
  • figure 5
  • figure 4
Is this relevant?
2005
2005
A 2.5Gbps burst-mode CDR circuit is fabricated in 0.18mum CMOS process. The data generator for this CDR circuit is presented with… (More)
  • figure 1
  • figure 6
  • figure 7
  • figure 8
  • figure 14
Is this relevant?
2004
2004
We have developed a 10-Gbit/s burst-mode clock and data recovery IC for future WBM/TDM-PON access networks. A fabricated IC (CMOS… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 5
  • figure 4
Is this relevant?
2002
2002
We report 10-Gbit/s burst-mode clock and data recovery units for NRZ data format that use design-optimization, packaging, and bit… (More)
  • figure 2
  • figure 1
  • table 1
  • figure 3
  • figure 5
Is this relevant?