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Power gating

Known as: Gating 
Power gating is a technique used in integrated circuit design to reduce power consumption, by shutting off the current to blocks of the circuit that… 
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Many crossbenchmarking results reported in the open literature raise optimistic expectations on the use of optical networks-on… 
Review
2013
Review
2013
During recent years, Wireless Sensor Networks captured the imagination of many researchers with number of applications growing… 
Highly Cited
2011
Highly Cited
2011
As technology continues to shrink, reducing leakage is critical to achieving energy efficiency. Previous studies on low-power… 
2010
2010
The emergence of Negative Bias Temperature Instability (NBTI) as the most relevant source of reliability in sub-90nm technologies… 
2009
2009
We present design approaches and circuit techniques to perform data and power management in high-density neural recording… 
2008
2008
This work provides a dual-mode baseband transceiver chipset for wireless body area network (WBAN) system. The modulation schemes… 
2007
2007
In this paper we focus on leakage reduction through automatic insertion of sleep transistors using a row-based granularity. In… 
2006
2006
Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large… 
2005
2005
For static CMOS Clock-Gating is a well-known method to decrease dynamic losses. In order to reduce the static power consumption…