• Publications
  • Influence
Networks on Chips: A New SoC Paradigm
TLDR
Focusing on using probabilistic metrics such as average values or variance to quantify design objectives such as performance and power will lead to a major change in SoC design methodologies. Expand
A survey of design techniques for system-level dynamic power management
TLDR
This paper describes how systems employ power-manageable components and how the use of dynamic reconfiguration can impact the overall power consumption, and survey recent initiatives in standardizing the hardware/software interface to enable software-controlled power management of hardware components. Expand
NoC synthesis flow for customized domain specific multiprocessor systems-on-chip
TLDR
This work illustrates a complete synthesis flow, called Netchip, for customized NoC architectures, that partitions the development work into major steps (topology mapping, selection, and generation) and provides proper tools for their automatic execution (SUNMAP, xpipescompiler). Expand
Analysis of error recovery schemes for networks on chips
TLDR
This article explores error control mechanisms at the data link and network layers and presents the schemes' architectural details to investigate the energy efficiency, error protection efficiency, and performance impact of various error recovery mechanisms. Expand
Soft-to-Hard Vector Quantization for End-to-End Learning Compressible Representations
We present a new approach to learn compressible representations in deep architectures with an end-to-end training strategy. Our method is based on a soft (continuous) relaxation of quantization andExpand
Networks on chips - technology and tools
  • L. Benini, G. Micheli
  • Engineering, Computer Science
  • The Morgan Kaufmann series in systems on silicon
  • 2006
TLDR
This book is the first to provide a unified overview of NoC technology, and includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. Expand
Xpipes: a network-on-chip architecture for gigascale systems-on-chip
TLDR
An advanced NoC architecture, called Xpipes, targeting high performance and reliable communication for on-chip multi-processors is introduced, which consists of a library of soft macros that are design-time composable and tunable so that domain-specific heterogeneous architectures can be instantiated and synthesized. Expand
Hibernus: Sustaining Computation During Intermittent Supply for Energy-Harvesting Systems
TLDR
A new approach, Hibernus, is proposed, which enables computation to be sustained during intermittent supply by reactively hibernating: saving system state only once, when power is about to be lost, and then sleeping until the supply recovers. Expand
Error control schemes for on-chip communication links: the energy-reliability tradeoff
TLDR
Redundant bus coding is proved to be an effective technique for trading off energy against reliability, so that the most efficient scheme can be selected to meet predefined reliability requirements in a low signal-to-noise ratio regime. Expand
Policy optimization for dynamic power management
TLDR
A finite-state, abstract system model for power-managed systems based on Markov decision processes is introduced and the problem of finding policies that optimally tradeoff performance for power can be cast as a stochastic optimization problem and solved exactly and efficiently. Expand
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