PMOS logic

Known as: PMOS 
P-type metal-oxide-semiconductor logic uses p-channel metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other… (More)
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Papers overview

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Highly Cited
2009
Highly Cited
2009
A 32nm logic technology for high performance microprocessors is described. 2nd generation high-k + metal gate transistors provide… (More)
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Highly Cited
2008
Highly Cited
2008
This paper presents a novel approach for implementing ultra-low-power digital components and systems using source-coupled logic… (More)
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Highly Cited
2007
Highly Cited
2007
A 45 nm logic technology is described that for the first time incorporates high-k + metal gate transistors in a high volume… (More)
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Highly Cited
2007
Highly Cited
2007
A broadband inductorless low-noise amplifier (LNA) design that utilizes simultaneous noise and distortion cancellation is… (More)
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Highly Cited
2006
Highly Cited
2006
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this… (More)
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Highly Cited
2006
Highly Cited
2006
Ge pMOS mobilities up to 358 cm<sup>2</sup>/Vs are demonstrated using a Si-compatible process flow without the incorporation of… (More)
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Highly Cited
2005
Highly Cited
2005
Negative bias temperature instability has become an important reliability concern for ultra-scaled Silicon IC technology with… (More)
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Highly Cited
2004
Highly Cited
2004
A leading-edge 90-nm technology with 1.2-nm physical gate oxide, 45-nm gate length, strained silicon, NiSi, seven layers of Cu… (More)
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Highly Cited
2003
Highly Cited
2003
This paper describes the details of a novel strained transistor architecture which is incorporated into a 90nm logic technology… (More)
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Highly Cited
1997
Highly Cited
1997
We present a new pass-transistor adiabatic logic (PAL) that operates from a single power-clock supply and outperforms the… (More)
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