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PMOS logic

Known as: PMOS 
P-type metal-oxide-semiconductor logic uses p-channel metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other… 
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Related topics

Related topics

23 relations
CMOSCentral processing unitDepletion-load NMOS logicEPROM

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
The influence of clock-gating on NBTI-induced delay degradation
This paper presents an analysis of the implications of clock gating techniques on the increase of aging degradations in new node… 
2010
2010
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major… 
2010
2010
Post-placement STI well width adjusting by geometric programming for device mobility enhancement in critical path
Size of STI wells is another significant factor to affect the stress magnitude(device mobility) besides size of transistor active… 
2007
2007
Ultra-low power subthreshold current-mode logic utilising PMOS load device
A novel approach for implementing MOS current-mode logic (MCML) circuits that can operate with ultra low bias currents is… 
2005
2005
Low power SRAM techniques for handheld products
SRAM leakage constitutes a significant portion of the standby power budget of modern SoC products for handheld applications such… 
2005
2005
A 13.56 MHz CMOS RF Identification Passive Tag LSI with Ferroelectric Random Access Memory
A radio frequency identification tag LSI operating with the carrier frequency of 13.56MHz as well as storing nonvolatile… 
Highly Cited
2003
Highly Cited
2003
Diffusion barrier cladding in Si/SiGe resonant interband tunneling diodes and their patterned growth on PMOS source/drain regions
Si/SiGe resonant interband tunnel diodes (RITDs) employing /spl delta/-doping spikes that demonstrate negative differential… 
Highly Cited
2000
Highly Cited
2000
A CMOS charge pump for low voltage operation
This paper proposes a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies… 
2000
2000
A 12.5 GHz back-gate tuned CMOS voltage controlled oscillator
This paper presents the design and measurements of a 12.5 GHz CMOS VCO. The circuit is an LC oscillator using an integrated… 
1990
1990
A half-micron SRAM cell using a double-gated self-aligned polysilicon PMOS thin film transistor (TFT) load
An SRAM cell structure using stacked double-gated, self-aligned polysilicon PMOS thin-film transistors (TFT) is described. This…