A CMOS charge pump for low voltage operation

@article{Moisiadis2000ACC,
  title={A CMOS charge pump for low voltage operation},
  author={Y. Moisiadis and I. Bouras and A. Arapoyanni},
  journal={2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)},
  year={2000},
  volume={5},
  pages={577-580 vol.5}
}
  • Y. Moisiadis, I. Bouras, A. Arapoyanni
  • Published 2000
  • Materials Science, Computer Science
  • 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)
This paper proposes a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies. The proposed charge pump utilises the cross-connected NMOS, voltage doubler, as a pumping stage. For low-voltage operation, where the performance of the NMOS is limited due to body effect, PMOS are used to increase the pumping gain. Simulations at 50 MHz have shown that for power supply voltages of 2 V, 1.5 V, 1.2 V and 0.9 V an output voltage of 11.5 V, 8.4 V, 6.5… Expand
86 Citations
A CMOS Low Voltage Charge Pump
  • 36
Charge Pump Circuits for Low-voltage Applications
  • 8
  • PDF
A highly efficient CMOS charge pump for 1.2 V supply voltage
  • 1
Charge Pump Circuits for Low-voltage Applications *
  • Y. MOISIADISa, I. BOURASc, A. ARAPOYANNIa
  • 2015
  • 2
  • Highly Influenced
  • PDF
A CMOS charge pump for sub-2.0 V operation
  • 20
A low-voltage charge pump with wide current driving capability
  • O. Wong, W. Tam, C. Kok, H. Wong
  • Engineering
  • 2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)
  • 2010
  • 6
A design of CMOS voltage doubler for 1 V operation
  • W. Qi, Shao Bing-xian
  • Computer Science
  • ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549)
  • 2001
  • 1
Design of Modified Four-Phase CMOS Charge Pumps for Low-Voltage Flash Memories
  • 10
A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories
  • 8
An Improved Highly Efficient Low Input Voltage Charge Pump Circuit
...
1
2
3
4
5
...

References

SHOWING 1-10 OF 15 REFERENCES
MOS charge pumps for low-voltage operation
  • 373
  • PDF
A high-efficiency CMOS voltage doubler
  • 413
Analysis and Design of a Charge Pump Circuit for High Output Current Applications
  • 34
  • PDF
An experimental 1.5-V 64-Mb DRAM
  • 180
A dynamic analysis of the Dickson charge pump circuit
  • 316
High-voltage regulation and process considerations for high-density 5 V-only E/sup 2/PROM's
  • 22
A 2.7 V only 8 Mb/spl times/16 NOR flash memory
  • J.C. Chen, T. Kuo, +5 authors Y. Kasa
  • Materials Science
  • 1996 Symposium on VLSI Circuits. Digest of Technical Papers
  • 1996
  • 16
A 2.|E|-Bit Distributed Algorithm for the Directed Euler Trail Problem
  • 14,676
...
1
2
...