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Network on a chip
Known as:
On-chip network
, Network-on-a-chip
, Network on chip
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Network on chip or network on a chip (NoC or NOC) is a communication subsystem on an integrated circuit (commonly called a "chip"), typically between…
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Related topics
Related topics
32 relations
Asynchronous circuit
CMOS
Clock signal
Cloud computing
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
Architecting a Secure Wireless Network-on-Chip
Brian Lebiednik
,
S. Abadal
,
Hyoukjun Kwon
,
T. Krishna
ACM/IEEE International Symposium on Networks-on…
2018
Corpus ID: 51962746
With increasing integration in SoCs, the Network-on-Chip (NoC) connecting cores and accelerators is of paramount importance to…
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Highly Cited
2013
Highly Cited
2013
Opportunistic Spectrum Access Using Partially Overlapping Channels: Graphical Game and Uncoupled Learning
Yuhua Xu
,
Qi-hui Wu
,
Jinlong Wang
,
Liang Shen
,
A. Anpalagan
IEEE Transactions on Communications
2013
Corpus ID: 18167274
This article investigates the problem of distributed channel selection in opportunistic spectrum access (OSA) networks with…
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2012
2012
Design and evaluation of Mesh-of-Tree based Network-on-Chip using virtual channel router
Santanu Kundu
,
J. Soumya
,
S. Chattopadhyay
Microprocessors and microsystems
2012
Corpus ID: 24191005
Highly Cited
2011
Highly Cited
2011
Q-learning based congestion-aware routing algorithm for on-chip network
F. Farahnakian
,
M. Ebrahimi
,
M. Daneshtalab
,
P. Liljeberg
,
J. Plosila
IEEE International Conference on Networked…
2011
Corpus ID: 16073613
Network congestion can limit performance of NoC due to increased transmission latency and power consumption. Congestion-aware…
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Review
2008
Review
2008
A theoretical and experimental study of geometric networks
Mohammad Farshi
2008
Corpus ID: 267152010
• A submitted manuscript is the author's version of the article upon submission and before peer-review. There can be important…
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Highly Cited
2007
Highly Cited
2007
An Analytical Performance Model for the Spidergon NoC
M. Moadeli
,
A. Shahrabi
,
W. Vanderbauwhede
,
Partha P. Maji
International Conference on Advanced Information…
2007
Corpus ID: 8745445
Highly Cited
2005
Highly Cited
2005
Building Predictable Systems on Chip: An Analysis of Guaranteed Communication in the Aethereal Network on Chip
Om Prakash Gangwal
,
A. Radulescu
,
K. Goossens
,
S. Pestana
,
E. Rijpkema
2005
Corpus ID: 59892164
As the complexity of Systems-on-Chip (SoC) is growing, meeting real-time requirements is becoming increasingly difficult…
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Highly Cited
2005
Highly Cited
2005
Power-aware test scheduling in network-on-chip using variable-rate on-chip clocking
Chunsheng Liu
,
V. Iyengar
,
Jiangfan Shi
,
É. Cota
IEEE VLSI Test Symposium
2005
Corpus ID: 11601913
Network-on-chip is the new paradigm in core-based system design. Reuse of the on-chip communication network for NoC test is…
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Highly Cited
2004
Highly Cited
2004
Comparative analysis of serial vs parallel links in NoC
Arkadiy Morgenshtein
,
I. Cidon
,
A. Kolodny
,
R. Ginosar
International Symposium on System-on-Chip…
2004
Corpus ID: 163340
An analytical model is employed to characterize and compare serial and parallel communication techniques in NoC interconnects…
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2002
2002
A fuzzy diagnosis approach using dynamic fault trees
Sheng-Yung Chang
,
C. Lin
,
Chuei-Tin Chang
2002
Corpus ID: 67792825
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