Communication and task scheduling of application-specific networks-on-chip

@inproceedings{Hu2005CommunicationAT,
  title={Communication and task scheduling of application-specific networks-on-chip},
  author={Jingcao Hu and R. Marculescu},
  year={2005}
}
  • Jingcao Hu, R. Marculescu
  • Published 2005
  • Computer Science
  • The objective of the paper is to introduce a novel energy-aware scheduling (EAS) algorithm which statically schedules application-specific communication transactions and computation tasks onto heterogeneous network-on-chip (NoC) architectures. The proposed algorithm automatically assigns the application tasks onto different processing elements and then schedules their execution under real-time constraints. At the same time, the algorithm takes into consideration the exact communication delay by… CONTINUE READING
    79 Citations
    Resource-efficient routing and scheduling of time-constrained streaming communication on networks-on-chip
    • 26
    • PDF
    Contention Aware Energy Efficient Scheduling on Heterogeneous Multiprocessors
    • 32
    Contention aware scheduling for NoC-based real-time systems
    • 3
    A Diffusional Schedule for Traffic Reducing on Network-on-Chip
    • J. Wang, Meng Zhang, M. Qiu
    • Computer Science
    • 2018 5th IEEE International Conference on Cyber Security and Cloud Computing (CSCloud)/2018 4th IEEE International Conference on Edge Computing and Scalable Cloud (EdgeCom)
    • 2018
    Evaluation of energy and buffer aware application mapping for networks-on-chip
    • 7
    Resource-Efficient Routing and Scheduling of Time-Constrained Network-on-Chip Communication
    • 23
    • PDF
    Efficient Scheduling Algorithms for MpSoC Systems
    • 13

    References

    SHOWING 1-10 OF 29 REFERENCES
    Exploiting the routing flexibility for energy/performance aware mapping of regular NoC architectures
    • J. Hu, R. Marculescu
    • 2003 Design, Automation and Test in Europe Conference and Exhibition
    • 2003
    • 117
    • PDF
    Energy-aware mapping for tile-based NoC architectures under performance constraints
    • 571
    • PDF
    Scheduling with bus access optimization for distributed embedded systems
    • 146
    • PDF
    Bandwidth-constrained mapping of cores onto NoC architectures
    • S. Murali, G. D. Micheli
    • Computer Science
    • Proceedings Design, Automation and Test in Europe Conference and Exhibition
    • 2004
    • 707
    • PDF
    Power-conscious joint scheduling of periodic task graphs and aperiodic tasks in distributed real-time embedded systems
    • Jiong Luo, N. Jha
    • Computer Science
    • IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140)
    • 2000
    • 192
    A voltage scheduling heuristic for real-time task graphs
    • 19
    • PDF
    A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures
    • 892
    • PDF
    Packetized on-chip interconnect communication analysis for MPSoC
    • 94
    • PDF
    Task scheduling and voltage selection for energy minimization
    • 166
    Task scheduling and voltage selection for energy minimization
    • 258
    • PDF