Finite state machine with datapath
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This paper proposes an extended Finite State Machine with Datapath (FSMD) partitioning that performs three-dimensional (3D) high… (More)
- IEEE Transactions on Reliability
A hard disk drive (HDD) failure may cause serious data loss and catastrophic consequences. Online health monitoring provides… (More)
High-Level Synthesis (HLS) comprises translating a behavioral specification into its corresponding Register Transfer Level (RTL… (More)
In a System on a Chip (SoC) design, we use an IP-based design methodology to reduce design time. An interface circuit design is… (More)
This paper presents a reconfigurable architecture of the Advanced Encryption Standard (AES-Rijndael) cryptosystem. The suggested… (More)
A QoS switch scheduling algorithm with rate and delay guarantees is proposed. The algorithm applies to a classic input-buffered… (More)
Resent investigations have shown the very good results of digital systems and circuits optimization using integration of dynamic… (More)
This paper presents a methodology for the formal verification of scheduling during High-Level Synthesis(HLS). A notion of… (More)
- IEEE Trans. VLSI Syst.
This paper presents a complete methodology to design a Totally Self-Checking sequential architecture based on the generic… (More)