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Finite state machine with datapath

Known as: FSMD 
A Finite State Machine with Datapath (FSMD) is a mathematical abstraction that is sometimes used to design digital logic or computer programs. An… Expand
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
This paper proposes an extended Finite State Machine with Datapath (FSMD) partitioning that performs three-dimensional (3D) high… Expand
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Highly Cited
2013
Highly Cited
2013
A hard disk drive (HDD) failure may cause serious data loss and catastrophic consequences. Online health monitoring provides… Expand
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2010
2010
In this chapter, we introduce an important building block for efficient custom hardware design: the Finite State Machine with… Expand
2008
2008
High-Level Synthesis (HLS) comprises translating a behavioral specification into its corresponding Register Transfer Level (RTL… Expand
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Highly Cited
2008
Highly Cited
2008
A formal method for checking equivalence between a given behavioral specification prior to scheduling and the one produced by the… Expand
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2006
2006
Traditional analog-to-digital conversion with uniform sampling is simple, but it adds to SoCs redundancy in its output data… Expand
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2004
2004
This paper presents a methodology for the formal verification of scheduling during High-Level Synthesis(HLS). A notion of… Expand
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2004
2004
Resent investigations have shown the very good results of digital systems and circuits optimization using integration of dynamic… Expand
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2002
2002
  • S. Zhao, D. Gajski
  • IEEE International Symposium on Circuits and…
  • 2002
  • Corpus ID: 206961091
In order to improve the productivity of current register transfer level (RTL) design practice, we argue that a new methodology of… Expand
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Highly Cited
1994
Highly Cited
1994
The basic problem of high-level synthesis is the mapping of a behavioral description of a digital system into an RTL design… Expand
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