Register-transfer level

Known as: RTL, RTL design, Register transfer level 
In digital circuit design, register-transfer level (RTL) is a design abstraction which models a synchronous digital circuit in terms of the flow of… (More)
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Highly Cited
2011
Highly Cited
2011
Escalating system-on-chip design complexity is pushing the design community to raise the level of abstraction beyond register… (More)
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2010
2010
In this paper we present a new automated tool for illegal state identification at Register Transfer Level (RTL). This tool is the… (More)
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2008
2008
Variability in circuit delay is a significant challenge in the design and synthesis of digital circuits. While the challenge is… (More)
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2006
2006
In this paper, we propose a macromodeling approach that allows to estimate the power dissipation of intellectual property (IP… (More)
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2005
2005
This paper discusses the potential benefits of inserting scan chains (SCs) in hierarchical designs at the register-transfer level… (More)
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2004
2004
As the complexity of designed Systems on Chip (SoC) increases, due to the ever growing number of transistors that can be… (More)
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2004
2004
The proliferation of system-on-chip designs is forcing us to consider the possibility of doing all design phases at the highest… (More)
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2002
2002
In this paper we introduce a novel concept that can be used for augmenting simulation based verification at the Register Transfer… (More)
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1995
1995
Register-transfer level designs that are derived from high-level synthesis systems generally consist of functional blocks and… (More)
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1995
1995
The problem of estimating the energy consumption at register transfer level is addressed from an information theoretical point of… (More)
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