• Publications
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GARNET: A detailed on-chip network model inside a full-system simulator
TLDR
We developed a detailed cycle-accurate interconnection network model (GARNET), inside the GEMS full-system simulation framework. Expand
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Dynamic voltage scaling with links for power optimization of interconnection networks
TLDR
In this paper we motivate the use of dynamic voltage scaling (DVS) for links, where the frequency and voltage of links are dynamically adjusted to minimize power consumption. Expand
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An Algorithm for Synthesis of Reversible Logic Circuits
TLDR
Reversible logic finds many applications, especially in the area of quantum computing. Expand
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Express virtual channels: towards the ideal interconnection fabric
TLDR
We propose express virtual channels, a novel flow control mechanism which allows packets to virtually bypass intermediate routers along their path in a completely non-speculative fashion, thereby lowering the energy/delay towards that of a dedicated wire while simultaneously approaching ideal throughput with a practical design suitable for on-chip networks. Expand
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Testing of Digital Systems
From the Publisher: As the complexity of modern digital systems increases, so does the need for ever more rigorous testing at all levels, from individual chips up to complete system architectures.Expand
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A study of the energy consumption characteristics of cryptographic algorithms and security protocols
TLDR
We investigate the impact of various parameters at the protocol level (such as cipher suites, authentication mechanisms, and transaction sizes, etc.) and the cryptographic algorithm level (cipher modes, strength) on the overall energy consumption for secure data transactions. Expand
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A Comprehensive Study of Security of Internet-of-Things
  • A. Mosenia, N. Jha
  • Computer Science
  • IEEE Transactions on Emerging Topics in Computing
  • 1 October 2017
TLDR
We provide a comprehensive list of vulnerabilities and countermeasures against them on the edge-side layer of IoT, which consists of three levels: (i) edge nodes, (ii) communication, and (iii) edge computing. Expand
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Hijacking an insulin pump: Security attacks and defenses for a diabetes therapy system
TLDR
We demonstrate security attacks that we have implemented in the laboratory on a popular glucose monitoring and insulin delivery system available on the market, and propose defenses against such attacks. Expand
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High-Level Power Analysis and Optimization
List of Figures. List of Tables. Preface. 1. Introduction. 2. Background. 3. Architecture-Level Power Estimation. 4. Power Management. 5. High-Level Synthesis for Low Power. 6. Conclusions and FutureExpand
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MOGAC: a multiobjective genetic algorithm for hardware-software cosynthesis of distributed embedded systems
  • Robert P. Dick, N. Jha
  • Computer Science
  • IEEE Trans. Comput. Aided Des. Integr. Circuits…
  • 1 December 1998
TLDR
We present a hardware-software cosynthesis system, called MOGAC, that partitions and schedules embedded system specifications consisting of multiple periodic task graphs. Expand
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