GARNET: A detailed on-chip network model inside a full-system simulator
- Niket Agarwal, T. Krishna, L. Peh, N. Jha
- Computer ScienceIEEE International Symposium on Performance…
- 26 April 2009
A detailed cycle-accurate interconnection network model (GARNET) is developed, inside the GEMS full-system simulation framework, that provides a detailed and accurate memory system timing model and shows that in improving on-chip network latency-throughput, EVCs do lead to better overall system runtime, however, the impact varies widely across applications.
Dreaming to Distill: Data-Free Knowledge Transfer via DeepInversion
- Hongxu Yin, Pavlo Molchanov, J. Kautz
- Computer ScienceComputer Vision and Pattern Recognition
- 18 December 2019
DeepInversion is introduced, a new method for synthesizing images from the image distribution used to train a deep neural network, which optimizes the input while regularizing the distribution of intermediate feature maps using information stored in the batch normalization layers of the teacher.
Dynamic voltage scaling with links for power optimization of interconnection networks
This paper proposes a history-based DVS policy that judiciously adjusts link frequencies and voltages based on past utilization that realizes up to 6.3/spl times/ power savings and is accompanied by a moderate impact on performance.
Express virtual channels: towards the ideal interconnection fabric
- Amit Kumar, L. Peh, P. Kundu, N. Jha
- Computer ScienceInternational Symposium on Computer Architecture
- 9 June 2007
This paper proposes express virtual channels (EVCs), a novel flow control mechanism which allows packets to virtually bypass intermediate routers along their path in a completely non-speculative fashion, thereby lowering the energy/delay towards that of a dedicated wire while simultaneously approaching ideal throughput with a practical design suitable for on-chip networks.
A Comprehensive Study of Security of Internet-of-Things
- A. Mosenia, N. Jha
- Computer ScienceIEEE Transactions on Emerging Topics in Computing
- 1 October 2017
This survey attempts to provide a comprehensive list of vulnerabilities and countermeasures against them on the edge-side layer of IoT, which consists of three levels: (i) edge nodes, (ii) communication, and (iii) edge computing.
An Algorithm for Synthesis of Reversible Logic Circuits
- Pallav Gupta, Abhinav Agrawal, N. Jha
- Computer ScienceIEEE Transactions on Computer-Aided Design of…
- 1 November 2006
The algorithm uses the positive-polarity Reed-Muller expansion of a reversible function to synthesize the function as a network of Toffoli gates, and is able to quickly synthesize all four-variable and most five-variable reversible functions that were in the test suite.
A study of the energy consumption characteristics of cryptographic algorithms and security protocols
- N. R. Potlapally, S. Ravi, A. Raghunathan, N. Jha
- Computer ScienceIEEE Transactions on Mobile Computing
- 1 February 2006
This paper presents a comprehensive analysis of the energy requirements of the most popular transport-layer security protocol: Secure Sockets Layer (SSL), and investigates the impact of various parameters at the protocol level and the cryptographic algorithm level on the overall energy consumption for secure data transactions.
Fault-tolerant computer system design
- N. Jha
- Computer ScienceIEEE Parallel & Distributed Technology Systems…
- 24 January 1996
Fault-Tolerant Computer System Design by Dhiraj K. Pradhan examines the design of fault-tolerant systems and their applications in the oil and gas industry.
Threshold network synthesis and optimization and its application to nanotechnologies
- Rui Zhang, Pallav Gupta, Lin Zhong, N. Jha
- Computer ScienceIEEE Transactions on Computer-Aided Design of…
- 2005
The first comprehensive synthesis methodology and tool for general multilevel threshold logic design is built, on top of an existing Boolean logic synthesis tool, for efficient threshold network synthesis of arbitrary multioutput Boolean functions.
Switching and Finite Automata Theory
Theories are made easier to understand with 200 illustrative examples, and students can test their understanding with over 350 end-of-chapter review questions.
...
...