Automated formal verification of scheduling with speculative code motions

@inproceedings{Kim2008AutomatedFV,
  title={Automated formal verification of scheduling with speculative code motions},
  author={Youngsik Kim and Nazanin Mansouri},
  booktitle={ACM Great Lakes Symposium on VLSI},
  year={2008}
}
We present a methodology for formal verification of scheduling phase of High-Level Synthesis (HLS) when speculative code motions are performed during this process. Verification relies on establishing functional equivalence between the result of scheduling and the behavioral specification of the design, using their FSMD models. We propose and formally define a relation between the two FSMDs that is less constrained than the strong equivalence, but stronger than weak equivalence. For verification… CONTINUE READING
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