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CAS latency

Known as: CAS, Memory access time, CL 
Column Access Strobe (CAS) latency, or CL, is the delay time between the moment a memory controller tells the memory module to access a particular… 
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Papers overview

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2013
2013
NAS parallel benchmarks (NPB) are a set of applications commonly used to evaluate parallel systems. We use the NPB-OpenMP version… 
2011
2011
In-memory tree structured index search is a fundamental database operation. Modern processors provide tremendous computing power… 
2009
2009
3-D stacking and integration can provide system advantages. This paper explores application drivers and computer-aided design… 
2005
2005
Improving locality of data references is becoming increasingly important due to increasing gap between processor cycle times and… 
1998
1998
Computer memory systems are increasingly a bottleneck limiting application performance. IRAM architectures, which integrate a CPU… 
1993
1993
  • Tom ChenG. Sunada
  • 1993
  • Corpus ID: 35948898
A memory architecture with the capability of self-testing and self-repairing is presented. The contributions of this memory… 
Highly Cited
1991
Highly Cited
1991
A linear systolic array for the discrete cosine transform, discrete sine transform, and their inverses is developed. It generates… 
1980
1980
This paper describes the circuit schemes used to substitute redundant storage locations for defective ones found during testing… 
1967
1967
The feasibility of transmitting blocks of words between memory and CPU is the subject of this study. The question is pertinent to…