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Division and Square Root: Digit-Recurrence Algorithms and Implementations
This chapter discusses the theory and implementation of Digit-Recurrence Division, and some of the implementations of this division were described in detail in general comments.
Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD
The application of the modified CORDIC method to matrix triangularization by Givens' rotations and to the computation of the singular value decomposition (SVD) are discussed.
A Radix-10 Combinational Multiplier
- T. Lang, A. Nannarelli
- Computer ScienceFortieth Asilomar Conference on Signals, Systems…
- 1 October 2006
The results of the implementation show that the combinational decimal multiplier offers a good compromise between latency and area when compared to other decimal multiply units and to binary double-precision multipliers.
Constant-Factor Redundant CORDIC for Angle Calculation and Rotation
A constant-factor redundant-CordIC (CFR-CORDIC) scheme, where the scale factor is kept constant while an angle for plane rotations is computed, is developed and found to provide an execution time similar to that of redundant CORDIC with a variable scaling factor, with a significant saving in area.
Individual flip-flops with gated clocks for low power datapaths
Energy consumption has become one of the important factors in digital systems, because of the requirement to dissipate this energy in high-density circuits and to extend the battery life in portable…
Leading-One Prediction with Concurrent Position Correction
The design presented here incorporates a concurrent position correction logic, operating in parallel with the LOP, to detect the presence of that error and produce the correct shift amount.
A Radix-10 Digit-Recurrence Division Unit: Algorithm and Architecture
The most significant slice of the recurrence, which includes the selection function, is implemented in radix-2, avoiding the additional delay introduced by the Radix-10 carry-save additions and allowing the balancing of the paths to reduce the cycle delay.
Working-zone encoding for reducing the energy in microprocessor address buses
- E. Musoll, T. Lang, J. Cortadella
- Computer ScienceIEEE Trans. Very Large Scale Integr. Syst.
- 1 December 1998
This work presents the working-zone encoding (WZE) method for encoding an external address bus, based on the conjecture that programs favor a few working zones of their address space at each instant.
On-the-Fly Conversion of Redundant into Conventional Representations
An algorithm to convert redundant number representations into conventional representations is presented, which is applicable in arithmetic algorithms such as nonrestoring division, square root, and on-line operations in which redundantly represented results are generated in a digit-by-digit manner.