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Dynamic random-access memory

Known as: Synchronous graphics RAM, Dynamic Random access memory, BEDO (RAM) 
Dynamic random-access memory (DRAM) is a type of random-access memory that stores each bit of data in a separate capacitor within an integrated… 
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Review
2014
Review
2014
  • T. Kirihata
  • 2014
  • Corpus ID: 30603112
We review high-density embedded 3D DRAM cache, industry 3D stacked DDR3 and wide IO mobile DRAM along with more recent Hybrid… 
Highly Cited
2013
Highly Cited
2013
As multi-core systems are becoming more popular in real-time embedded systems, strict timing requirements for accessing shared… 
2012
2012
ZusammenfassungWährend des Leseprozesses von dynamischen Ein-Transistor-/Ein-Kondensator-DRAM-Speicherzellen (1T-1C DRAM) ist es… 
2010
2010
A method for refreshing a Dynamic Random Access Memory (DRAM) includes performing a refresh on at least a portion of the DRAM at… 
Review
2003
Review
2003
  • T. Kirihata
  • 2003
  • Corpus ID: 53778549
For several decades, the 1-transistor Dynamic Random Access Memory (DRAM) has been the dominant choice for high density and low… 
Review
1999
Review
1999
The increasing gap between processor speed and main memory latency has accelerated the development of various innovative… 
Highly Cited
1999
Highly Cited
1999
The programmable BIST design presented here supports various test modes using a simple controller. With the March C algorithm… 
1994
1994
A novel DRAM cell technology consisting of an n-channel access transistor and a bootstrapped storage capacitor with an integrated… 
1986
1986
Soft errors in memory devices caused by ionizing radiation are well known. This sensitivity means that dynamic random access… 
1973
1973
Presents one version of a 4K dynamic MOS random-access memory utilizing a 3 device/bit cell with an area of less than 2 mil/SUP 2…