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Bit-level parallelism

Known as: Bitlevel parallelisms, Bit-level devices, Bit levels 
Bit-level parallelism is a form of parallel computing based on increasing processor word size. From the advent of very-large-scale integration (VLSI… 
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Related topics

Related topics

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Broader (1)

Parallel computing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
Model-Implemented Fault Injection for Robustness Assessment
The complexity of safety-related embedded computer systems is steadilyincreasing. Besides verifying that such systems implement… 
2011
2011
A Novel Chaos-based Image Encryption Scheme with an Improved Permutation Process
Confidentiality is an important issue when digital images are transmitted over public networks, and encryption is the most useful… 
2006
2006
Bloom Filters via d-Left Hashing and Dynamic Bit Reassignment Extended Abstract
In recent work, the authors introduced a data structure with the same functionality as a counting Bloom filter (CBF) based on… 
Highly Cited
2005
Highly Cited
2005
Platform-based design from parallel C specifications
This paper presents Disydent, a framework dedicated to system-on-a-chip (SoC) platform-based design for shared memory multiple… 
Highly Cited
2000
Highly Cited
2000
A multiple input-multiple output channel model for simulation of Tx- and Rx-diversity wireless systems
Space-time receivers for wireless communication systems offer the possibility to have both Tx- and Rx-antennas. For a realistic… 
2000
2000
Design and FPGA implementation of orthonormal discrete wavelet transforms
FPGA technology offers the potential for low cost and high performance for certain applications, including image processing… 
1999
1999
Coarse Grained Reconfigurable Architectures
  • 1999
  • Corpus ID: 6905325
While the first systems for reconfigurable computation featured fine grained FPGAs, it was soon discovered, that FPGAs bear… 
1996
1996
VLSI Implementation of a Selective Median Filter
0001 0 0 1 0 0011 0111 1001 In this paper, the VLSI implementation of a selective median filter for the real-time applications is… 
1991
1991
Bit-level pipelined 2-D digital filters for real-time image processing
  • Cheng-Wen Wu
  • IEEE Trans. Circuits Syst. Video Technol.
  • 1991
  • Corpus ID: 11268295
Bit-level systolic arrays for real-time 2-D FIR and IIR (finite and infinite impulse response) filters are presented. Two… 
1988
1988
Application-specific CAD of VLSI second-order sections
An application-specific, very-high-level CAD (computer-aided design) tool is presented for producing very-high-throughput IIT… 
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