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Bit-level parallelism
Known as:
Bitlevel parallelisms
, Bit-level devices
, Bit levels
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Bit-level parallelism is a form of parallel computing based on increasing processor word size. From the advent of very-large-scale integration (VLSI…
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Related topics
Related topics
14 relations
16-bit
32-bit
4-bit
8-bit
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Broader (1)
Parallel computing
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
A Novel Chaos-based Image Encryption Scheme with an Improved Permutation Process
Xin Ma
,
Chong Fu
,
W. Lei
,
Shuo Li
2011
Corpus ID: 14047660
Confidentiality is an important issue when digital images are transmitted over public networks, and encryption is the most useful…
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2009
2009
On Providing Intelligibility-Aware Preservation Services for Digital Objects
Yannis Tzitzikas
Data Science Journal
2009
Corpus ID: 27253263
Preserving digital objects requires preservation of not only their bit-level representation but also their intelligibility. To…
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2008
2008
A High-Speed Viterbi Decoder
Qing Li
,
Xuan-zhong Li
,
Han-hong Jiang
,
Wen-hao He
Fourth International Conference on Natural…
2008
Corpus ID: 35634113
Convolutional codes are widely used in many communication systems due to their excellent error-control performance. High-speed…
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2007
2007
Recursive LLR Combining in Iterative Multiuser Decoding of Coded CDMA
R. Milner
,
L. Rasmussen
,
F. Brannstrom
2007
Corpus ID: 17004960
Due to the prohibitive complexity of optimal multiuser detection, suboptimal structures are commonly suggested for use in…
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2006
2006
Bloom Filters via d-Left Hashing and Dynamic Bit Reassignment Extended Abstract
F. Bonomi
,
M. Mitzenmacher
,
R. Panigrahy
,
Sushil Singh
,
G. Varghese
2006
Corpus ID: 282521
In recent work, the authors introduced a data structure with the same functionality as a counting Bloom filter (CBF) based on…
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1999
1999
Coarse Grained Reconfigurable Architectures
1999
Corpus ID: 6905325
While the first systems for reconfigurable computation featured fine grained FPGAs, it was soon discovered, that FPGAs bear…
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1997
1997
Ultrafast All-Optical Signal Processing for Packet Switching
D. Cotter
,
M. Tatham
,
+5 authors
P. Gunning
1997
Corpus ID: 62089977
Recent advances in the development of 100 Gbit/s self-routing packet networks are described. The most practical design approach…
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1997
1997
LH*s: a high-availability and high-security scalable distributed data structure
W. Litwin
,
Marie-Anne Neimat
Proceedings Seventh International Workshop on…
1997
Corpus ID: 8237283
LH*s is high availability variant of LH*, a Scalable Distributed Data Structure. An LH*s record is striped onto different server…
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1996
1996
VLSI Implementation of a Selective Median Filter
Chun-Te Chen Chun-Te Chen
,
Liang-Gee Chen Liang-Gee Chen
. Digest of Technical Papers., International…
1996
Corpus ID: 31914935
0001 0 0 1 0 0011 0111 1001 In this paper, the VLSI implementation of a selective median filter for the real-time applications is…
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1991
1991
Bit-level pipelined 2-D digital filters for real-time image processing
Cheng-Wen Wu
IEEE Trans. Circuits Syst. Video Technol.
1991
Corpus ID: 11268295
Bit-level systolic arrays for real-time 2-D FIR and IIR (finite and infinite impulse response) filters are presented. Two…
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