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Architectural state
The architectural state is the part of the CPU which holds the state of a process, this includes: * Control registers * Instruction Flag Registers…
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Related topics
Related topics
8 relations
Arithmetic logic unit
Barrel processor
Central processing unit
Control register
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Soft-error mitigation by means of decoupled transactional memory threads
Daniel Sánchez
,
Juan M. Cebrian
,
José M. García
,
Juan L. Aragón
Distributed computing
2014
Corpus ID: 253978157
CMOS scaling exacerbates hardware errors making reliability a big concern for recent and future microarchitecture designs…
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2008
2008
Interconnect architectural state coverage measurement methodology
P·曼纳瓦
,
A·丁甘卡
,
C-T·周
,
N·米特尔
,
M·拉达克里西南
,
S·玛雅科
2008
Corpus ID: 196005584
The present invention describes a method and apparatus for ensuring effective acknowledgment protocol or architecture, such as an…
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2007
2007
Flow structure around a rectangular cylinder near a solid surface
G. Blois
,
S. Malavasi
2007
Corpus ID: 16812038
The mean flow structure around an elongated rectangular cylinder near a solid wall has been here quantitatively characterized by…
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2004
2004
SimSnap: fast-forwarding via native execution and application-level checkpointing
P. Szwed
,
Daniel Marques
,
Robert M. Buels
,
S. McKee
,
M. Schulz
Eighth Workshop on Interaction between Compilers…
2004
Corpus ID: 7260013
As systems become more complex, conducting cycle-accurate simulation experiments becomes more time consuming. Most approaches to…
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2004
2004
Direct SMARTS : Accelerating Microarchitectural Simulation Through Direct Execution
Shelley Chen
2004
Corpus ID: 8796287
Due to growing complexity and costs of hardware systems, computer architects traditionally rely on software simulation to…
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2002
2002
Pre-Silicon Validation of Hyper-Threading Technology
D. Burns
2002
Corpus ID: 14461432
Hyper-Threading Technology delivers significantly improved architectural performance at a lower-thantraditional power consumption…
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2001
2001
A Processor-Level Framework for High-Performance and High-Dependability
Sanjay J. Patel
,
Z. Kalbarczyk
,
R. Iyer
,
Wojciech G. Magda
,
Nithin Nakka
2001
Corpus ID: 17110985
This paper presents a processor-level error detection and recovery framework that can operate reliably in the presence of…
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2000
2000
Architectural state-machines
C. Leung
,
S. Gage
2000
Corpus ID: 59105809
The work described in this paper was carried out at the Bartlett School of Architecture, University College London. It is an…
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Review
2000
Review
2000
Overview of the IA-64 Architecture
Karthik Swaminathan
2000
Corpus ID: 18155307
Introduction:..................................................................................2 Architecture Design…
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1998
1998
Katmai Enhances MMX: 10/5/98
K. Diefendorff
1998
Corpus ID: 9649235
In an unusual reversal of roles, Intel for the first time has been racing to catch up with AMD on x86 architectural extensions…
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