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Architectural state
The architectural state is the part of the CPU which holds the state of a process, this includes: * Control registers * Instruction Flag Registers…
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Related topics
Related topics
8 relations
Arithmetic logic unit
Barrel processor
Central processing unit
Control register
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
TASPDetect: Reviving Trust in 3PIP By Detecting TASP Trojans
Chidhambaranathan Rajamanikkam
,
Kurt Brenning
,
A. Deakin
,
Sanghamitra Roy
,
Koushik Chakraborty
Microprocessors and microsystems
2018
Corpus ID: 45341779
2015
2015
Soft-error mitigation by means of decoupled transactional memory threads
Daniel Sánchez
,
J. M. Cebrian
,
José M. García
,
Juan L. Aragón
Distributed computing
2015
Corpus ID: 6664803
CMOS scaling exacerbates hardware errors making reliability a big concern for recent and future microarchitecture designs…
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2014
2014
Soft-error mitigation by means of decoupled transactional memory threads
Daniel Sánchez
,
J. M. Cebrian
,
José M. García
,
Juan L. Aragón
Distributed computing
2014
Corpus ID: 253978157
CMOS scaling exacerbates hardware errors making reliability a big concern for recent and future microarchitecture designs…
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2011
2011
Portable trace compression through instruction interpretation
Svilen Kanev
,
R. Cohn
IEEE International Symposium on Performance…
2011
Corpus ID: 73803
Execution traces are a useful tool in studying processor and program behavior. However, the amount of information that needs to…
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2011
2011
The cut, the hole and the eclipse: Matta-Clark's sections
Hernán Barría Chateau
2011
Corpus ID: 67787250
Resumen en: In 1974, Matta-Clark cut a suburban family house scheduled for demolition; action called "Splitting", a radical…
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2011
2011
Assuring application-level correctness against soft errors
J. Cong
,
Karthik Gururaj
IEEE/ACM International Conference on Computer…
2011
Corpus ID: 9141565
Traditionally, research in fault tolerance has required architectural state to be numerically perfect for program execution to be…
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2006
2006
CP with Architectural State Lookup for Functional Test Generation
B. Gutkovich
,
A. Moss
IEEE International High Level Design Validation…
2006
Corpus ID: 2835992
Constraint programming (CP) is a powerful technology that has proved very useful in random functional test generation. On the…
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2005
2005
Multithreaded value prediction
Nathan Tuck
,
D. Tullsen
International Symposium on High-Performance…
2005
Corpus ID: 5458893
This paper introduces a technique which leverages value prediction and multithreading on a simultaneous multithreading processor…
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2004
2004
An Optimized Front-End Physical Register File with Banking and Writeback Filtering
M. Pericàs
,
R. González
,
A. Cristal
,
A. Veidenbaum
,
M. Valero
Power-Aware Computer Systems
2004
Corpus ID: 133090
Register file design is one of the critical issues facing designers of out-of-order processors. Scaling up its size and number of…
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2000
2000
Architectural state-machines
C. Leung
,
S. Gage
2000
Corpus ID: 59105809
The work described in this paper was carried out at the Bartlett School of Architecture, University College London. It is an…
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