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Control register

Known as: SMEP (disambiguation), Control Registers, EFER 
A control register is a processor register which changes or controls the general behavior of a CPU or other digital device. Common tasks performed by… 
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Related topics

Related topics

39 relations
AMD K6Address-range registerAddressing modeArchitectural state

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Distribution Study of Corypha utan Lamk. From Herbarium Bogorienses Specimens and the Conservation Areas in East Java
S pecies of palms widely used as building materials, household, handy crafts, food resources, oil sources, energy sources… 
2014
2014
A 0.1pJ Freeze Vernier time-to-digital converter in 65nm CMOS
A Freeze Vernier delay line time-to-digital converter for very low power and high resolution is presented. The Freeze Vernier… 
2009
2009
How the Ceteris Paribus Principles of Morality Lie
This paper addresses the issue of how the ceteris paribus principles of morality lie. I discuss a recent attempt by Margaret… 
Highly Cited
2007
Highly Cited
2007
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial… 
2003
2003
Classification des structures CR invariantes pour les groupes de Lie compacts
Let G0 be a compact Lie group of dimension N whose Lie algebra is g0 . The notion of CR structure on a C∞ manifold is known a… 
2002
2002
The microarchitecture of the IBM eServer z900 processor
The recent IBM ESA/390 CMOS line of processors, from 1997 to 1999, consisted of the G4, G5, and G6 processors. The architecture… 
2001
2001
Combined IEEE compliant and truncated floating point multipliers for reduced power dissipation
Truncated multiplication can be used to significantly reduce power dissipation for applications that do not require correctly… 
2001
2001
Performance of the Complex Streamed Instruction Set on Image Processing Kernels
The Complex Streamed Instruction (CSI) set is an architectural paradigm designed to accelerate multimedia applications. These… 
Review
2000
Review
2000
The implicit reaction function of the Central Bank of the Republic of Turkey
Reviewing the implicit reaction function estimation under different specifications, it appears that the Central Bank of the… 
2000
2000
An Automatic Controller Extractor for HDL Descriptions at the RTL
Extracting controlling finite-state machines can significantly reduce state space and thereby speed functional verification. The… 
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