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Wide-issue

A wide-issue architecture is a computer processor that issues more than one instruction per clock cycle. They can be considered in three broad types… Expand
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2006
2006
This paper presents a novel low power design methodology for dynamic CMOS circuits in order to improve the design trade-off… Expand
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Highly Cited
2003
Highly Cited
2003
The bypass paths and multiported register files in microprocessors serve as an implicit interconnect to communicate operand… Expand
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2000
2000
PICO is a fully automated system for designing the architecture and the microarchitecture of VLIW and EPIC processors. A serious… Expand
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Highly Cited
1999
Highly Cited
1999
This paper proposes and evaluates software techniques that increase register file utilization for simultaneous multithreading… Expand
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1999
1999
As the performance gap between processor and memory grows, memory latency becomes a major bottleneck in achieving high processor… Expand
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Highly Cited
1998
Highly Cited
1998
Instruction scheduling is one of the most important phases of compilation for high-performance processors. A compiler typically… Expand
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Highly Cited
1997
Highly Cited
1997
Presents the case for billion-transistor processor architectures that will consist of chip multiprocessors (CMPs): multiple (four… Expand
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Highly Cited
1997
Highly Cited
1997
Simultaneous multithreading is a processor design which consumes both thread-level and instruction-level parallelism. In SMT… Expand
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Highly Cited
1996
Highly Cited
1996
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle… Expand
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Highly Cited
1996
Highly Cited
1996
A major obstacle in designing dynamically scheduled processors is the size and port requirement of the register file. By using a… Expand
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