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Wide-issue

A wide-issue architecture is a computer processor that issues more than one instruction per clock cycle. They can be considered in three broad types… 
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2006
2006
This paper presents a novel low power design methodology for dynamic CMOS circuits in order to improve the design trade-off… 
Highly Cited
2003
Highly Cited
2003
The bypass paths and multiported register files in microprocessors serve as an implicit interconnect to communicate operand… 
2000
2000
PICO is a fully automated system for designing the architecture and the microarchitecture of VLIW and EPIC processors. A serious… 
1999
1999
As the performance gap between processor and memory grows, memory latency becomes a major bottleneck in achieving high processor… 
Highly Cited
1999
Highly Cited
1999
This paper proposes and evaluates software techniques that increase register file utilization for simultaneous multithreading… 
1998
1998
  • M. Moudgill
  • Proceedings 31st Annual Simulation Symposium
  • 1998
  • Corpus ID: 45954409
In this paper we describe techniques that enable the implementation of a fast processor simulator. These techniques have been… 
Highly Cited
1997
Highly Cited
1997
Simultaneous multithreading is a processor design which consumes both thread-level and instruction-level parallelism. In SMT… 
Highly Cited
1997
Highly Cited
1997
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined… 
Highly Cited
1996
Highly Cited
1996
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle… 
Highly Cited
1995
Highly Cited
1995
Current compilers for VLIW and superscalar machines increase the instruction level parallelism of an application by merging…