Skip to search formSkip to main contentSkip to account menu

Out-of-order execution

Known as: Dynamic execution, In-order processor, Ooe 
In computer engineering, out-of-order execution (or more formally dynamic execution) is a paradigm used in most high-performance microprocessors to… 
Wikipedia (opens in a new tab)

Related topics

Related topics

50 relations
AMD K5ARM Cortex-A12ARM Cortex-A7ARM Cortex-A9

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Harvesting Runtime Data in Android Applications for Identifying Malware and Enhancing Code Analysis
It is generally a challenging task to tell apart malware from benign applications: obfuscation and string encryption, used by… 
2010
2010
Improving Reordering with Linguistically Informed Bilingual n-grams
We present a new reordering model estimated as a standard n-gram language model with units built from morpho-syntactic… 
Highly Cited
2009
Highly Cited
2009
CellMR: A framework for supporting mapreduce on asymmetric cell-based clusters
The use of asymmetric multi-core processors with on-chip computational accelerators is becoming common in a variety of… 
2008
2008
Predictable Out-of-Order Execution Using Virtual Traces
The problem of worst-case execution time (WCET) analysis of complex CPUs is addressed in this paper using a proposed… 
2005
2005
Executable task models
Current task modeling techniques have a shortcoming in that they only use the model at design time. This means that the… 
Highly Cited
2004
Highly Cited
2004
STEPS towards Cache-resident Transaction Processing
1998
1998
An adaptive approach to object-oriented real-time computing
Real time computing is becoming an enabling technology for many important distributed applications such as flexible manufacturing… 
1997
1997
Verifying out-of-order executions
The paper presents an approach to the specification and verification of out-of-order execution in the design of micro-processors… 
1995
1995
A 64b 4-issue out-of-order execution RISC processor
This processor is the first implementation of the SPARC V9 64b instruction set architecture and has an estimated performance… 
1993
1993
Visualization of Message Passing Parallel Programs with the TOPSYS Parallel Programming Environment
Abstract Parallel programming is orders of magnitudes more complex than writing sequential programs. This is particularly true… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)