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Transport triggered architecture

Known as: TTA, Transport Triggered Architectures 
In computer architecture, a transport triggered architecture (TTA) is a kind of CPU design in which programs directly control the internal transport… 
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Related topics

Related topics

24 relations
Accumulator (computing)Addressing modeBus (computing)CPU power dissipation

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2010
Highly Cited
2010
Direct numerical simulation of hypersonic boundary layer transition over a blunt cone with a small angle of attack
The direct numerical simulation of boundary layer transition over a 5° half-cone-angle blunt cone is performed. The free-stream… 
2005
2005
Area - Time - Power and Design effort: the basic tradeoffs in Application Specific Systems
  • M. Flynn
  • IEEE International Conference on Application…
  • 2005
  • Corpus ID: 29517015
Application specific is always a tradeoff among competing design goals (or design parameters). In addition to the well… 
2004
2004
TRANSPORT TRIGGERED ARCHITECTURES ON FPGA
TAMPERE UNIVERSITY OF TECHNOLOGY Degree Program in Information Technology Digital and Computer Systems Niiranen, Miika Johannes… 
2003
2003
Code Compression on Transport Triggered Architectures
Entropy coding is an efficient method for compressing information and it can be used to improve code density of processor… 
Highly Cited
1999
Highly Cited
1999
TTAs: Missing the ILP complexity wall
  • H. Corporaal
  • Journal of systems architecture
  • 1999
  • Corpus ID: 6602723
Highly Cited
1996
Highly Cited
1996
Code generation for transport triggered architectures
Transport triggered architectures (TTAs) form a class of architectures which are programmed by specifying data transports between… 
Highly Cited
1994
Highly Cited
1994
Design of transport triggered architectures
  • H. Corporaal
  • Proceedings of 4th Great Lakes Symposium on VLSI
  • 1994
  • Corpus ID: 45520512
Transport triggered architectures (TTAs) form a superclass of traditional very large instruction word (VLIW) architectures, in… 
1994
1994
Register file port requirements of transport triggered architectures
Exploitation of large amounts of instruction level parallelism requires a large amount of connectivity between the shared… 
1994
1994
Transport-Triggering versus Operation-Triggering
Transport-triggered architectures are a new class of architectures that provide more scheduling freedom and have unique compiler… 
1991
1991
Software pipelining for transport-triggered architectures
This paper discusses software pipelining for a new class of architectures that we call transport-triggered. These architectures… 
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