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Transport triggered architecture
Known as:
TTA
, Transport Triggered Architectures
In computer architecture, a transport triggered architecture (TTA) is a kind of CPU design in which programs directly control the internal transport…
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Related topics
Related topics
24 relations
Accumulator (computing)
Addressing mode
Bus (computing)
CPU power dissipation
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Aggressively bypassing list scheduler for transport triggered architectures
Heikki O. Kultala
,
T. Viitanen
,
P. Jääskeläinen
,
J. Takala
International Conference / Workshop on Embedded…
2016
Corpus ID: 7891454
A new instruction scheduling algorithm for Transport Triggered Architecture (TTA) is introduced. The proposed scheduling…
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2009
2009
Low-Power Application-Specific Processor for FFT Computations
Teemu Pitkänen
,
J. Takala
IEEE International Conference on Acoustics…
2009
Corpus ID: 1226136
In this paper, a processor architecture tailored for radix-4 and mixed-radix FFT computations is described. The processor has…
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2008
2008
Context adaptive binary arithmetic decoding on transport triggered architectures
Joona Rouvinen
,
P. Jääskeläinen
,
Tero Rintaluoma
,
O. Silvén
,
J. Takala
Electronic imaging
2008
Corpus ID: 16606796
Video coding standards, such as MPEG-4, H.264, and VC1, define hybrid transform based block motion compensated techniques that…
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2006
2006
Loop Scheduling for Transport Triggered Architecture Processors
P. Salmela
,
Risto Mäkinen
,
P. Jääskeläinen
,
J. Takala
International Symposium on System-on-Chip
2006
Corpus ID: 36047347
Compilation of programs for highly parallel processors requires efficient scheduling of parallel resources. The innermost loops…
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2005
2005
Area - Time - Power and Design effort: the basic tradeoffs in Application Specific Systems
M. Flynn
IEEE International Conference on Application…
2005
Corpus ID: 29517015
Application specific is always a tradeoff among competing design goals (or design parameters). In addition to the well…
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2004
2004
TRANSPORT TRIGGERED ARCHITECTURES ON FPGA
Miika Niiranen
,
J. Takala
2004
Corpus ID: 14745763
TAMPERE UNIVERSITY OF TECHNOLOGY Degree Program in Information Technology Digital and Computer Systems Niiranen, Miika Johannes…
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2003
2003
Code Compression on Transport Triggered Architectures
J. Heikkinen
,
J. Takala
,
Jaakko Sertamo
2003
Corpus ID: 17555054
Entropy coding is an efficient method for compressing information and it can be used to improve code density of processor…
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2001
2001
Compiler Strategies for Transport Triggered Architectures
Johan Janssen
2001
Corpus ID: 39606256
Compiler technology plays an important role to enhance the performance of modern microprocessors. In this thesis, compiler…
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Highly Cited
1994
Highly Cited
1994
Design of transport triggered architectures
H. Corporaal
Proceedings of 4th Great Lakes Symposium on VLSI
1994
Corpus ID: 45520512
Transport triggered architectures (TTAs) form a superclass of traditional very large instruction word (VLIW) architectures, in…
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1991
1991
Software pipelining for transport-triggered architectures
J. Hoogerbrugge
,
H. Corporaal
,
Hans M. Mulder
MICRO 24
1991
Corpus ID: 5450549
This paper discusses software pipelining for a new class of architectures that we call transport-triggered. These architectures…
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