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Bus (computing)
Known as:
Cache bus
, EDB
, Bus (computer)
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In computer architecture, a bus (a contraction of the Latin omnibus) is a communication system that transfers data between components inside a…
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Related topics
Related topics
50 relations
AMD Radeon Rx 200 series
Accelerated Graphics Port
Aircraft Communications Addressing and Reporting System
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
Urban Transit Coordination Using an Artificial Transportation System
Lefei Li
,
Han Zhang
,
Xiaofang Wang
,
Wei Lu
,
Zongping Mu
IEEE transactions on intelligent transportation…
2011
Corpus ID: 16394234
An urban transit system usually consists of several modes, including busses, streetcars, a subway, and light rail. Unfortunately…
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Highly Cited
2009
Highly Cited
2009
Traffic-Known Urban Vehicular Route Prediction Based on Partial Mobility Patterns
Guangtao Xue
,
Zhongwei Li
,
Hongzi Zhu
,
Yunhuai Liu
International Conference on Parallel and…
2009
Corpus ID: 15827618
Travel route analysis and prediction are essential for the success of many applications in Vehicular Ad-hoc Networks (VANETs…
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Review
1997
Review
1997
Design of the 21174 Memory Controller for DIGITAL Personal Workstations
R. Schumann
Digital technical journal of Digital Equipment…
1997
Corpus ID: 39438234
Vol. 9 No. 2 1997 57 As microprocessor performance has relentlessly improved in recent years, it has become increasingly…
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Highly Cited
1995
Highly Cited
1995
The Codesign of Embedded Systems: A Unified Hardware/Software Representation
Sanjaya Kumar
,
J. Aylor
,
Barry W. Johnson
,
W. Wulf
Springer US
1995
Corpus ID: 43052766
Current practice dictates the separation of the hardware and software development paths early in the design cycle. These paths…
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Highly Cited
1995
Highly Cited
1995
A detailed analysis of GOS defects in MOS transistors: testing implications at circuit level
J. Segura
,
Carol de Benito
,
A. Rubio
,
C. Hawkins
International Test Conference
1995
Corpus ID: 206678069
The properties of Gate Oxide Short defects (GOS) in CMOS circuits are investigated identifying the most relevant parameters that…
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Highly Cited
1991
Highly Cited
1991
Post-processor for data path synthesis using multiport memories
I. Ahmad
,
C. Y. Chen
IEEE International Conference on Computer-Aided…
1991
Corpus ID: 21093105
A novel design methodology for data path synthesis using multiport memories is presented which can be applied to scheduled…
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1990
1990
Multiple-bus shared-memory system: Aquarius project
C. Dubois
,
F. Scheurich
,
+5 authors
Michael J. Carlton
Computer
1990
Corpus ID: 6048576
A multiple-bus architecture called a multi-multi is presented. The architecture is designed to handle several dimensions with a…
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Highly Cited
1988
Highly Cited
1988
A new interface specification methodology and its application to transducer synthesis
G. Borriello
,
R. Katz
1988
Corpus ID: 61932641
In this dissertation, I present a new methodology for the abstract specification of digital circuit interfaces. An interface is…
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Highly Cited
1986
Highly Cited
1986
A message passing framework for logical query evaluation
A. Van Gelder
ACM SIGMOD Conference
1986
Corpus ID: 15853197
We formulate the problem of query evaluatron over a relational database (EDB) supplemented by functronfree Horn clause rules (IDB…
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Highly Cited
1985
Highly Cited
1985
Modeling and Test Generation Algorithms for MOS Circuits
Sunil K. Jain
,
V. Agrawal
IEEE transactions on computers
1985
Corpus ID: 3003981
An application of the D-algorithm in generating tests for MOS circuit faults is described. The MOS circuits considered are…
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