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Bus (computing)

Known as: Cache bus, EDB, Bus (computer) 
In computer architecture, a bus (a contraction of the Latin omnibus) is a communication system that transfers data between components inside a… 
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Papers overview

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2011
2011
Urban Transit Coordination Using an Artificial Transportation System
An urban transit system usually consists of several modes, including busses, streetcars, a subway, and light rail. Unfortunately… 
2010
2010
Strategies for reactive power control in wind farms with STATCOM
This paper presents three strategies for reactive power control in wind farms with STATCOM. First, the STATCOM system and its… 
2009
2009
A Safety-Case Approach For Certifying Adaptive Systems
Adaptive systems—those that can change their behavior at runtime—pose new challenges for certification, and particularly for… 
2002
2002
On-Chip Monitoring of Single- and Multiprocessor Hardware Real-Time Operating Systems
This paper presents a novel hardware monitoring system that gives non-intrusive observability into the execution of hardware… 
2002
2002
Mimics: Exploiting Satellite Technology for an Intelligent Convoy
Describes Mimics (Mobile Intelligent Model incorporating Independent Control and Sensing) - a manually-driven vehicle which… 
2000
2000
Embedded Controller Hardware Design
From the Publisher: The term "embedded system" refers to the incorporation of microcontrollers and microprocessors in equipment… 
2000
2000
Communication Scheduling
The high arithmetic rates of media processing applications require architectures with tens to hundreds of functional units… 
Review
1997
Review
1997
Design of the 21174 Memory Controller for DIGITAL Personal Workstations
Vol. 9 No. 2 1997 57 As microprocessor performance has relentlessly improved in recent years, it has become increasingly… 
1990
1990
Multiple-bus shared-memory system: Aquarius project
A multiple-bus architecture called a multi-multi is presented. The architecture is designed to handle several dimensions with a… 
1988
1988
Lazy Data Routing And Greedy Scheduling For Application-specific Signal Processors
This paper concerns code generation for a troublesome class of horizontal-instruction-word architectures (whose machine language…