Test compression

Test Compression is a technique used to reduce the time and cost of testing integrated circuits. The first ICs were tested with test vectors created… (More)
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Related topics

Related topics

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Design for testingElectronic design automationIntegrated circuitIntegrated circuit design

Broader (1)

Electronic engineering

Papers overview

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2015
2015
Isometric Test Data Compression
This paper introduces a novel test data compression scheme, which is primarily devised for low-power test applications. It is… (More)
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2014
2014
Isometric test compression with low toggling activity
The paper presents a novel test data compression scheme. The invention follows from a fundamental observation that in a typical… (More)
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2010
2010
Test Data Compression Using Efficient Bitmask and Dictionary Selection Methods
Higher circuit densities in system-on-chip (SOC) designs have led to drastic increase in test data volume. Larger test data size… (More)
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2010
2010
Defect Coverage-Driven Window-Based Test Compression
Although LFSR reseeding based on test cubes for modeled faults is an efficient test compression approach, it suffers from the… (More)
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2009
2009
Low-Power Scan Operation in Test Compression Environment
This paper presents a new and comprehensive low-power test scheme compatible with a test compression environment. The key… (More)
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2006
2006
Test Compression for FPGAs
Conventional ASIC test compression techniques cannot be used for FPGAs due to the lack of unspecified bits in FPGA test… (More)
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Highly Cited
2006
Highly Cited
2006
XPAND: an efficient test stimulus compression technique
Combinational circuits implemented with exclusive-or gates are used for on-chip generation of deterministic test patterns from… (More)
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Highly Cited
2005
Highly Cited
2005
RL-huffman encoding for test compression and power reduction in scan applications
This article mixes two encoding techniques to reduce test data volume, test pattern delivery time, and power dissipation in scan… (More)
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2003
2003
Test application time and volume compression through seed overlapping
We propose in this paper an extension on the Scan Chain Concealment technique to further reduce test time and volume requirement… (More)
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1987
1987
A Unified View of Test Compression Methods
A unified treatment of the various techniques to reduce the output data from a unit under test is given. The characteristics of… (More)
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