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Low-Power Digital Signal Processing Using Approximate Adders
TLDR
This paper proposes logic complexity reduction at the transistor level as an alternative approach to take advantage of the relaxation of numerical accuracy, and demonstrates the utility of these approximate adders in two digital signal processing architectures with specific quality constraints. Expand
IMPACT: IMPrecise adders for low-power approximate computing
TLDR
This paper proposes logic complexity reduction as an alternative approach to take advantage of the relaxation of numerical accuracy, and demonstrates this concept by proposing various imprecise or approximate Full Adder cells with reduced complexity at the transistor level, and utilizing them to design approximate multi-bit adders. Expand
Security as a new dimension in embedded system design
TLDR
This paper attempts to provide a unified and holistic view of embedded system security by first analyzing the typical functional security requirements for embedded systems from an end-user perspective and identifying the implied challenges for embedded system architects, as well as hardware and software designers. Expand
Analysis and characterization of inherent application resilience for approximate computing
TLDR
This work analysis and characterization of inherent application resilience present in a suite of 12 widely used applications from the domains of recognition, data mining, and search and proposes a systematic framework for Application Resilience Characterization (ARC), which characterizes the resilient parts using approximation models that abstract a wide range of approximate computing techniques. Expand
Battery-driven system design: a new frontier in low power design
TLDR
An introduction to this emerging area of battery modeling and battery-efficient system design is presented, promising technologies that have been developed are surveyed, and emerging industry standards for smart battery systems are outlined. Expand
A study of the energy consumption characteristics of cryptographic algorithms and security protocols
TLDR
This paper presents a comprehensive analysis of the energy requirements of the most popular transport-layer security protocol: Secure Sockets Layer (SSL), and investigates the impact of various parameters at the protocol level and the cryptographic algorithm level on the overall energy consumption for secure data transactions. Expand
TapeCache: a high density, energy efficient cache based on domain wall memory
TLDR
TapeCache is proposed, a first attempt to employ DWMs as last-level caches in general purpose computing platforms and proposes a novel circuit-architecture co-design for TapeCache, consisting of a multi-port DWM macro-cell optimized for read operations considering the asymmetry in applications' read/write characteristics. Expand
Tarazu: optimizing MapReduce on heterogeneous clusters
TLDR
Tarazu, a suite of optimizations to improve MapReduce performance on heterogeneous clusters, is presented, showing that Tarazu significantly improves performance over a baseline of Hadoop with straightforward tuning for hardware heterogeneity. Expand
Hijacking an insulin pump: Security attacks and defenses for a diabetes therapy system
TLDR
The study shows that both passive attacks and active attacks can be successfully launched using public-domain information and widely available off-the-shelf hardware and proposed defenses against such attacks have the potential to mitigate the security risks associated with personal healthcare systems. Expand
Computing in Memory With Spin-Transfer Torque Magnetic RAM
TLDR
This work addresses the challenge of reliable in-memory computing under process variations by extending error-correction code schemes to detect and correct errors that occur during CiM operations and proposes architectural enhancements to processor instruction sets and on-chip buses that enable STT-CiM to be utilized as a scratchpad memory. Expand
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