Stuck-at fault

Known as: SSL, Single stuck line 
A stuck-at fault is a particular fault model used by fault simulators and automatic test pattern generation (ATPG) tools to mimic a manufacturing… (More)
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2014
2014
Scan chain diagnosis turns out to be an important yield enhancement factor in modern nanometer technologies. An easy to implement… (More)
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2012
2012
Fault simulation is an essential tool in electronic design automation. The accuracy of the computation of fault coverage in… (More)
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Highly Cited
2009
Highly Cited
2009
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There… (More)
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2005
2005
Recently design for manufacturability (DFM) has been required to achieve higher process yield. Information obtained from silicon… (More)
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2005
2005
While most of the fault diagnosis tools are based on gate level fault models, for instance the stuck-at model, many faults are… (More)
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2003
2003
This paper presents a didactic simulator for stuck-at (sa) faults on logic circuits. The tool has a set of features that helps to… (More)
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1998
1998
Making predictions about the longevity of the single stuck-at fault model is a highly speculative yet nonetheless popular activit… (More)
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1998
1998
One of the common misconceptions about stuck-at fault model is that it does not model a physical defect accurately and therefore… (More)
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Highly Cited
1990
Highly Cited
1990
The traditional approach to diagnosing stuck-at faults with fault dictionaries generated for stuck-at faults is not appropriate… (More)
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Highly Cited
1974
Highly Cited
1974
The commonly used stuck-at fault fails to model logic circuit shorts. Bridging faults are defined to model these circuit mal… (More)
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