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Statistical static timing analysis

Known as: SSTA 
Conventional static timing analysis (STA) has been a stock analysis algorithm for the design of digital circuits over the last 30 years. However, in… 
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Related topics

Related topics

4 relations
Delay calculationSignoff (electronic design automation)Static timing analysis

Broader (1)

Formal methods

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
A Skew-Normal Canonical Model for Statistical Static Timing Analysis
The use of quadratic gate delay models and arrival times results in improved accuracies for a parameterized block-based… 
2013
2013
Crosstalk timing windows overlap in statistical static timing analysis
Process variation can have significant impact on device and interconnect performance, especially in the presence of crosstalk. A… 
2011
2011
Temperature aware statistical static timing analysis
With technology scaling, the variability of device parameters continues to increase. This impacts both the performance and the… 
2009
2009
On hierarchical statistical static timing analysis
Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the… 
2009
2009
Efficient modeling of spatial correlations for parameterized statistical static timing analysis
This paper presents an efficient method to model spatial correlations in the context of parameterized statistical static timing… 
2007
2007
Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part… 
2006
2006
Refined statistical static timing analysis through learning spatial delay correlations
Statistical static timing analysis (SSTA) has been a popular research topic in recent years. A fundamental issue with applying… 
2006
2006
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits… 
2005
2005
Timing yield estimation using statistical static timing analysis
As process variations become a significant problem in deep sub-micron technology, a shift from deterministic static timing… 
Review
2004
Review
2004
Toward stochastic design for digital circuits - statistical static timing analysis
Due to the process variations and the variations of environmental factors such as supply voltage and temperature, the circuit… 
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