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Statistical static timing analysis

Known as: SSTA 
Conventional static timing analysis (STA) has been a stock analysis algorithm for the design of digital circuits over the last 30 years. However, in… Expand
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Papers overview

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Highly Cited
2009
Highly Cited
2009
We explore the implementation of Monte Carlo based statistical static timing analysis (SSTA) on a Graphics Processing Unit (GPU… Expand
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Review
2009
Review
2009
As the device and interconnect physical dimensions decrease steadily in modern nanometer silicon technologies, the ability to… Expand
Review
2008
Review
2008
Static-timing analysis (STA) has been one of the most pervasive and successful analysis engines in the design of digital circuits… Expand
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2008
2008
Increasing process variation in the nanometer regime motivates the use of statistical static timing analysis tools for timing… Expand
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2007
2007
With CMOS technology scaling down to the nanometer realm, process variations have been increased. In particular, the increase of… Expand
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Highly Cited
2007
Highly Cited
2007
Existing statistical static timing analysis (SSTA) techniques suffer from limited modeling capability by using a linear delay… Expand
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2007
2007
As technology continues to advance deeper into the nanometer regime, a tight control on the process parameters is increasingly… Expand
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2007
2007
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part… Expand
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Highly Cited
2005
Highly Cited
2005
With an increasing trend in the variation of the primary parameters affecting circuit performance, the need for statistical… Expand
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Highly Cited
2005
Highly Cited
2005
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire… Expand
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