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Delay calculation

Delay calculation is the term used in integrated circuit design for the calculation of the gate delay of a single logic gate and the wires attached… 
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17 relations
Asynchronous systemElectronic design automationElmore delayIntegrated circuit design

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2010
2010
NIM- a noise index model to estimate delay discrepancies between silicon and simulation
As CMOS technology continues to scale, the accurate prediction of silicon timing through the use of pre-silicon modeling and… 
2007
2007
Merge Logic for Clustered Multithreaded VLIW Processors
Clustered VLIW embedded processors have become widespread due to benefits of simple hardware and low power. Simultaneous… 
Highly Cited
2005
Highly Cited
2005
A new method for design of robust digital circuits
As technology continues to scale beyond 100 nm, there is a significant increase in performance uncertainty of CMOS logic due to… 
2005
2005
VITA: variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input
As technology scales down, timing verification of digital integrated circuits becomes an extremely difficult task due to… 
2002
2002
Checking delay-insensitivity: 10/sup 4/ gates and beyond
Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This… 
2002
2002
Measurement and Evaluation of Artificial Dielectric Material
Abstract : This report describes measurements of dielectric parameters for artificial dielectric materials using picosecond time… 
1998
1998
RF circuits fabricated with CMOS-compatible SiGe HBT process module
We report results of experimental circuits fabricated in a new modular SiGe HBT technology. A variety of available active and… 
1997
1997
Timing analysis for extended burst-mode circuits
We describe an efficient timing analysis technique for extended burst-mode circuits implemented according to the 3D design style… 
1994
1994
Predicting circuit performance using circuit-level statistical timing analysis
Recognizing that the delay of a circuit is extremely sensitive to manufacturing process variations, this paper proposes a… 
1984
1984
ANALYSIS OF REDUCED DELAY AND OTHER ENHANCEMENTS TO PASSER II 80 PASSER II 84 FINAL REPORT
This report represents the development and findings of a research project conducted by the Texas Transportation Institute…