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Front end of line

Known as: FEOL, Front-end-of-line 
The front-end-of-line (FEOL) is the first portion of IC fabrication where the individual devices (transistors, capacitors, resistors, etc.) are… 
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Papers overview

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2019
2019
In advanced DRAM fabrication, wafer alignment is a key enabler to meet on-product overlay performance requirement. Due to the… 
2018
2018
In this letter, factor analysis is employed to investigate the hidden dependencies and correlations of plasma-induced damage with… 
2015
2015
We present split-cellTK, a tool that automates the obfuscation of split-foundry layout, in which an untrusted foundry fabricates… 
2015
2015
With the globalization of the integrated circuit (IC) design flow of chip fabrication, intellectual property (IP) piracy is… 
2013
2013
In this work we evaluate the impact of TSV processing and proximity on transistor performance and reliability by monitoring key… 
2010
2010
At ground level, alpha particles are a major source of soft errors. They may result from radioactive isotopes found in electronic… 
2009
2009
Through Silicon Via (TSV) is a very attractive solution for 3D stacking. Currently the main technique in industrial TSV processes… 
2009
2009
Three dimensional silicon integration technologies are gaining considerable attention as the traditional CMOS scaling becoming… 
2007
2007
Carbon is proposed as a new FEOL material with high conductivity and thermal stability for CMOS integration. Here the application… 
2001
2001
It is expected that 193nm lithography will be introduced in front-end-of-line processing for all critical layers at the 100nm…