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Back end of line

Known as: BEOL 
The back end of line (BEOL) is the second portion of IC fabrication where the individual devices (transistors, capacitors, resistors, etc.) get… 
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Related topics

Related topics

13 relations
Alpha 21064Chemical vapor depositionChemical-mechanical planarizationCopper interconnect

Broader (1)

Semiconductor device fabrication

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2019
Highly Cited
2019
Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration
The manufacturers of high-performance logic have been ardent champions of Moore's Law, which has resulted in exponential increase… 
Highly Cited
2013
Highly Cited
2013
Reliability of TSV interconnects: Electromigration, thermal cycling, and impact on above metal level dielectric
Highly Cited
2012
Highly Cited
2012
22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
We present a fully-integrated SOI CMOS 22nm technology for a diverse array of high-performance applications including server… 
Highly Cited
2011
Highly Cited
2011
3D copper TSV integration, testing and reliability
Node-agnostic Cu TSVs integrated with high-K/metal gate and embedded DRAM were used in functional 3D modules. Thermal cycling and… 
Highly Cited
2009
Highly Cited
2009
Impact of Low-Energy Proton Induced Upsets on Test Methods and Rate Predictions
Direct ionization from low energy protons is shown to cause upsets in a 65-nm bulk CMOS SRAM, consistent with results reported… 
Highly Cited
2006
Highly Cited
2006
A Logic Diagnosis Methodology for Improved Localization and Extraction of Accurate Defect Behavior
DIAGNOSIX is a comprehensive fault diagnosis methodology for characterizing failures in digital ICs. Using limited layout… 
2006
2006
Back-End-Of-Line Poly-Sige Disk Resonators
This paper reports the characterization of poly-silicon-germanium disk resonators at frequencies ranging from 35 to 425MHz. The… 
Highly Cited
2006
Highly Cited
2006
3-D Silicon Integration and Silicon Packaging Technology Using Silicon Through-Vias
System-on-Chip (SOC) and System-on-Package (SOP) technologies each have advantages depending on application needs. As system… 
Highly Cited
2005
Highly Cited
2005
Enabling SOI-based assembly technology for three-dimensional (3d) integrated circuits (ICs)
We present solutions to the key process technology challenges of three-dimensional (3D) integrated circuits (ICs) that enable… 
Highly Cited
2005
Highly Cited
2005
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
A high performance 65 nm SOI CMOS technology is presented. Dual stress liner (DSL), embedded SiGe, and stress memorization… 
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