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Digital clock manager
Known as:
DCM
, DFS
, Digital Frequency Synthesizer
A digital clock manager (DCM) is an electronic component available on some FPGAs (notably ones produced by Xilinx). A DCM is useful for manipulating…
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Related topics
Related topics
7 relations
Clock signal
Clock skew
Delay-locked loop
Duty cycle
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Broader (1)
Digital electronics
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Digital frequency synthesizer for 133Cs-vapor atomic clock
A. A. Petrov
,
V. Davydov
2017
Corpus ID: 64516169
A new configuration of the frequency synthesizer for the quantum frequency standard (QFS) on the 133Cs atoms is considered…
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2015
2015
Vector classification by a winner-take-all neural network with digital frequency-locked loop
H. Hikawa
IEEE International Joint Conference on Neural…
2015
Corpus ID: 10541140
This paper discusses performance of a winner-take-all neural network (WTANN) that is based on digital frequency-locked loops…
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2012
2012
A Dither-Less All Digital PLL for Cellular Transmitters
Luca Vercesi
,
Luca Fanori
,
F. Bernardinis
,
A. Liscidini
,
R. Castello
IEEE Journal of Solid-State Circuits
2012
Corpus ID: 28811205
An all-digital frequency synthesizer for cellular transmitter is presented. Low phase-noise is achieved both in-band and out-of…
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2008
2008
A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-$\mu$m CMOS
A. Bonfanti
,
D. Caro
,
A. D. Grasso
,
S. Pennisi
,
C. Samori
,
A. Strollo
IEEE Journal of Solid-State Circuits
2008
Corpus ID: 30677021
A wideband frequency synthesizer architecture is presented. The proposed topology employs a direct digital frequency synthesizer…
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2008
2008
A memory-reduced direct digital frequency synthesizer for OFDM receiver systems
Xiaojin Li
,
Linhui Lai
,
Ao Lei
,
Z. Lai
IEEE transactions on consumer electronics
2008
Corpus ID: 318718
Digital direct frequency synthesizer (DDFS) can be used to correct the carrier frequency offset (CFO) whose estimation and…
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2008
2008
Segmented Digital Clock Manager- FPGA based Digital Pulse Width Modulator Technique
M. Batarseh
,
W. Al-Hoor
,
L. Huang
,
C. Iannello
,
I. Batarseh
IEEE Power Electronics Specialists Conference
2008
Corpus ID: 31589204
A new digital pulse width modulator (DPWM) design for a field programmable gate array (FPGA) based systems is presented in this…
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2002
2002
Hardware optimized direct digital frequency synthesizer architecture with 60 dBc spectral purity
J. Langlois
,
D. Al-Khalili
IEEE International Symposium on Circuits and…
2002
Corpus ID: 42391903
We introduce a novel sine-output Direct Digital Frequency Synthesizer (DDFS) architecture, optimized for hardware implementation…
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Highly Cited
1999
Highly Cited
1999
Design of low-power ROM-less direct digital frequency synthesizer using nonlinear digital-to-analog converter
S. Mortezapour
,
Edward K. F. Lee
IEEE J. Solid State Circuits
1999
Corpus ID: 62563544
A design technique that uses nonlinear digital-to-analog converter (DAC) for implementing low-power direct digital frequency…
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Highly Cited
1995
Highly Cited
1995
A 2-V, 2-GHz low-power direct digital frequency synthesizer chip set for wireless communication
A. Yamagishi
,
M. Ishikawa
,
T. Tsukahara
,
S. Date
Proceedings of the IEEE Custom Integrated…
1995
Corpus ID: 62314577
A 2-GHz direct digital frequency synthesizer (DDFS) chip-set that operates at the very low supply voltage of 2 V is introduced…
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1994
1994
A low-power CMOS digitally synthesized 0-13 MHz agile sinewave generator
G. Chang
,
A. Rofougaran
,
M. Ku
,
Asad A. Abidi
,
H. Samueli
IEEE International Solid-State Circuits…
1994
Corpus ID: 60857156
A low-power monolithic 1 /spl mu/m CMOS IC generates a 26 MHz-wide single-sideband, frequency-hopped spread-spectrum waveform for…
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