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Design space exploration
Design space exploration (DSE) is the activity of exploring design alternatives before implementation. The ability to operate on the space of design…
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Advanced Simulation Library
Computer experiment
MULTICUBE
pSeven
Broader (3)
Design of experiments
Industrial engineering
Systems engineering
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2010
2010
Reliability-Driven System-Level Synthesis of Embedded Systems
C. Bolchini
,
A. Miele
IEEE 25th International Symposium on Defect and…
2010
Corpus ID: 28946638
This paper proposes an enhanced system-level synthesis flow for the design of reliable embedded systems, extending the classical…
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2009
2009
Power-Efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures
D. Kissler
,
Andreas Strawetz
,
Frank Hannig
,
J. Teich
Journal of Low Power Electronics
2009
Corpus ID: 8364913
Coarse-grained reconfigurable architectures deliver high performance and energy efficiency for computationally intensive…
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2008
2008
ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration
G. Beltrame
,
C. Bolchini
,
L. Fossati
,
A. Miele
,
D. Sciuto
Asia and South Pacific Design Automation…
2008
Corpus ID: 8121833
This paper presents ReSP (Reflective Simulation Platform), a Transaction-Level multi-processor simulation platform based on…
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2007
2007
A Retargetable Software Timing Analyzer Using Architecture Description Language
Xianfeng Li
,
Abhik Roychoudhury
,
T. Mitra
,
P. Mishra
,
Xu Cheng
Asia and South Pacific Design Automation…
2007
Corpus ID: 15836997
Worst case execution time (WCET) is an essential input for performance and schedulability analysis of real-time systems. Static…
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2007
2007
Design Space Exploration for the BLAST Algorithm Implementation
E. Sotiriades
,
A. Dollas
IEEE Symposium on Field-Programmable Custom…
2007
Corpus ID: 15105337
The most prevalent algorithm for DNA sequence matching is the BLAST algorithm. We have developed several FPGA-based architectures…
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2006
2006
NoC Monitoring Hardware Support for Fast NoC Design Space Exploration and Potential NoC Partial Dynamic Reconfiguration
Riad Ben Mouhoub
,
O. Hammami
International Symposium on Industrial Embedded…
2006
Corpus ID: 1542433
The Multiprocessor systems on chip are strongly emerging in various embedded systems to support dramatic growth of complex…
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2005
2005
Skeletons and Asynchronous RPC for Embedded Data- and Task Parallel Image Processing
W. Caarls
,
P. Jonker
,
H. Corporaal
IAPR International Workshop on Machine Vision…
2005
Corpus ID: 514720
Developing embedded parallel image processing applications is usually a very hardware-dependent process, requiring deep knowledge…
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2005
2005
Design space exploration on heterogeneous network-on-chip
Rodrigo Ferrugem Cardoso
,
M. Kreutz
,
L. Carro
,
A. Susin
IEEE International Symposium on Circuits and…
2005
Corpus ID: 22669353
High performance SoC designs using networks-on-chip (NoCs) take benefit from the speed-up coming from the available parallelism…
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Review
2003
Review
2003
System-level timing analysis and scheduling for embedded packet processors
Samarjit Chakraborty
2003
Corpus ID: 2745266
Packet processors are high-performance, programmable devices with special architectural features that are optimized for network…
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1995
1995
EMBEDDED SYSTEM CO-DESIGN TOWARDS PORTABILITY AND RAPID INTEGRATION
G. Borriello
,
P. Chou
,
R. Ortega
1995
Corpus ID: 15034936