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Wafer testing
Known as:
Wafer prober
, Wafer sort
Wafer testing is a step performed during semiconductor device fabrication. During this step, performed before a wafer is sent to die preparation, all…
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Related topics
Related topics
15 relations
Back end of line
Bond characterization
CPU cache
Chip-scale package
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Recent advances in fault isolation for semiconductor industry
Jiann Min Chin
,
V. Narang
,
+11 authors
F. Foo
International Symposium on the Physical and…
2013
Corpus ID: 39379716
In semiconductor companies, failure analysis (FA) activities play a major role in all many areas. FA is deeply involved in new…
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2013
2013
Reactivation of Spares for Off-Chip Memory Repair After Die Stacking in a 3-D IC With TSVs
Yung-Fa Chou
,
D. Kwai
,
Ming-Der Shieh
,
Cheng-Wen Wu
IEEE Transactions on Circuits and Systems Part 1…
2013
Corpus ID: 12940580
Memory, especially DRAM, is one of the candidates to be considered in three-dimensional integrated circuit (3-D IC), and in…
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2012
2012
Exploring a solar photovoltaic-based energy solution for green manufacturing industry
Heidi A. Taboada
,
Zhenhua Xiong
,
T. Jin
,
J. Jimenez
IEEE International Conference on Automation…
2012
Corpus ID: 16102997
A large amount of electricity is required to support the operation of large manufacturing facilities. Integrating renewable…
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2012
2012
Testing of Copper Pillar Bumps for Wafer Sort
B. Tunaboylu
IEEE Transactions on Components, Packaging, and…
2012
Corpus ID: 34680058
Using a copper pillar interconnect in flip chip packaging provides a lead-free solution that is more reliable, and also scalable…
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2012
2012
Gain Measurement of Embedded On-Chip Antennas in mmW/THz Range
M. Neshat
,
D. Hailu
,
M. Nezhad-Ahmadi
,
G. Z. Rafi
,
S. Safavi-Naeini
IEEE Transactions on Antennas and Propagation
2012
Corpus ID: 24522712
A method for gain measurement of embedded on-chip antennas in mmW/THz range is presented. In this method, the radiation pattern…
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2009
2009
High precision on-wafer backend capacitor mismatch measurements using a benchtop semiconductor characterization system
H. Tuinhout
,
F. van Rossem
,
N. Wils
IEEE International Conference on Microelectronic…
2009
Corpus ID: 40934735
This paper discusses a sophisticated backend capacitor mismatch characterization technique based on direct capacitance…
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2006
2006
A non-volatile embedded memory for high temperature automotive and high-retention applications
M. Thomas
,
J. Pathak
,
+5 authors
M. Schrems
IEEE International Symposium on Quality…
2006
Corpus ID: 14990796
A highly reliable and scalable non-volatile embedded memory cell and technology is described. This embedded technology operates…
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2006
2006
Overall Wafer Effectiveness (OWE): A Novel Industry Standard for Wafer Productivity
Chen-Fu Chien
,
Chia-Yu Hsu
,
Hong-Shing Chou
,
Chih-Wei Lin
IEEE International Symposium on Semiconductor…
2006
Corpus ID: 24674135
Overall equipment efficiency (OEE) is an index that is widely used to measure equipment performance for semiconductor…
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2002
2002
Defect printability analysis study using virtual stepper system in a production environment
S. Chiou
,
Henrry Lei
,
+10 authors
L. Pang
SPIE Advanced Lithography
2002
Corpus ID: 111103337
In this paper the simulation of wafer images for Attenuated Phase Shift Masks (ATTPSM) and repaired binary masks are performed by…
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1998
1998
Double-fused 1.5 µm vertical cavity lasers with record high To of 132 K at room temperature
K. A. Black
,
P. Abraham
,
+5 authors
E. Hu
1998
Corpus ID: 55394840
The authors report record high temperature performance of a novel long wavelength vertical cavity laser using an electron barrier…
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