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Chip-scale package

Known as: Wafer level chip scale package, Chip scale package, LFCSP 
A chip scale package or chip-scale package (CSP) is a type of integrated circuit package. Originally, CSP was the acronym for chip-size packaging… 
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Related topics

Related topics

9 relations
Ball grid arrayDie (integrated circuit)Embedded Wafer Level Ball Grid ArrayFlip chip

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Development of 3D Thin WLCSP Using Vertical Via Last TSV Technology with Various Temporary Bonding Materials and Low Temperature PECVD Process
3D WLCSP using via last TSV (through silicon via) technology is an ideal packaging technology to meet small-form-factor, high I/O… 
2013
2013
MmW devices: from WLCSP to smart interposers
2012
2012
A hybrid panel embedding process for fanout
As die sizes shrink with technology node advances, the area of WLCSP dice is becoming too small to accommodate all of the solder… 
2006
2006
An optimization analysis of UBM thicknesses and solder geometry on a wafer level chip scale package using robust methods
Wafer level chip scale package (WLCSP) has been recognized providing clear advantages over traditional wire-bond package in… 
Review
2004
Review
2004
! A Novel Joint-in-Via, Flip-Chip Chip-Scale Package
It is believed that the slower-than-expected adoption of flip-chip (FC) packages is due to the lagging advancement in substrate… 
2000
2000
A wafer-level chip scale package build up with a metal-covered polyimide post
Wafer-level chip scale packaging has been intensively being developed because of its advantages such as miniaturizing, thinning… 
1999
1999
Chip-scale packaging of a gyroscope using wafer bonding
The chip-scale packaging of a micromachined gyroscope is discussed. The angular rate sensor requires the micropackaging of… 
1999
1999
Rework Process for Chip-Scale Package
As the Chip-Scale Package presents today′s electronics manufacturing industry with many challenges in both the rework and repair… 
1998
1998
Chip size package : The option of choice for miniaturized medical devices
Especially for medical implantables applications size reduction of electronic packaging is coupled with a high functionality and… 
1986
1986
Silicon hybrid wafer-scale package technology
A wafer-scale packaging technology is discussed. Pretested IC chips are mounted in holes etched through silicon wafers. Chips are… 
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