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Flip chip
Known as:
Chip connection
, FCLGA
, Flip-chip
Flip chip, also known as controlled collapse chip connection or its abbreviation, C4, is a method for interconnecting semiconductor devices, such as…
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Related topics
Related topics
38 relations
AMD 580 chipset series
Alexander Coucoulas
Ball grid array
Bumpless Build-up Layer
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
Novel Bumping and Underfill Technologies for 3D IC Integration
Ki-Jun Sung
,
Kwang-Seong Choi
,
Hyun-Cheol Bae
,
Y. Kwon
,
Y. Eom
2012
Corpus ID: 58680302
In previous work, novel maskless bumping and no‐flow underfill technologies for three‐dimensional (3D) integrated circuit (IC…
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Highly Cited
2007
Highly Cited
2007
Thin-Film Encapsulated RF MEMS Switches
K. Leedy
,
R. Strawser
,
R. Cortez
,
J. Ebel
Journal of microelectromechanical systems
2007
Corpus ID: 19617053
A wafer-level thin-film encapsulation process has been demonstrated to package radio-frequency (RF) microelectromechanical…
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Highly Cited
2005
Highly Cited
2005
Nitride-based flip-chip ITO LEDs
S. Chang
,
C. S. Chang
,
+6 authors
H. Lo
IEEE Transactions on Advanced Packaging
2005
Corpus ID: 44227373
Nitride-based flip-chip indium-tin-oxide (ITO) light-emitting diodes (LEDs) were successfully fabricated. It was found that the…
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2005
2005
Simulation and measurement of supply and substrate noise in mixed-signal ICs
B. Owens
,
Sirisha Adluri
,
+4 authors
T. Fiez
IEEE Journal of Solid-State Circuits
2005
Corpus ID: 33478478
Digital noise in mixed-signal circuits is characterized using a scalable macromodel for substrate noise coupling. The noise…
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Highly Cited
2005
Highly Cited
2005
Die stress characterization in flip chip on laminate assemblies
M. Rahim
,
J. Suhling
,
+4 authors
R.W. Johnson
IEEE transactions on components and packaging…
2005
Corpus ID: 21592431
Minimizing device side die stresses is especially important when multiple copper/low-k interconnect redistribution layers are…
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Highly Cited
2004
Highly Cited
2004
Chip on paper technology utilizing anisotropically conductive adhesive for smart label applications
J. Rasul
Microelectronics and reliability
2004
Corpus ID: 29369656
Review
2004
Review
2004
Residual stresses in microelectronics induced by thermoset packaging materials during cure
M. Meuwissen
,
H. A. D. Boer
,
H. Steijvers
,
P. Schreurs
,
M. Geers
Microelectronics and reliability
2004
Corpus ID: 19342917
Highly Cited
2003
Highly Cited
2003
Effect of 0.5 wt % Cu in Sn-3.5%ag solder on the interfacial reaction with Au/Ni metallization
M. Alam
,
Y. Chan
,
K. Tu
2003
Corpus ID: 97083111
The work presented here focuses on the role of 0.5 wt % Cu in the interfacial reaction between the molten Sn−3.5%Ag solder and…
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2001
2001
Wettability of electroless Ni in the under bump metallurgy with lead free solder
B. Young
,
J. Duh
,
B. Chiou
2001
Corpus ID: 55723520
This study investigates the wettability of several lead-free solders, including Sn, Sn−Ag, and Sn−Bi, on electroless Ni (EN) with…
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1997
1997
60 GHz flip-chip assembled MIC design considering chip-substrate effect
Y. Arai
,
M. Sato
,
H. Yamada
,
T. Hamada
,
K. Nagai
,
H. Fujishiro
IEEE MTT-S International Microwave Symposium…
1997
Corpus ID: 2513186
In this paper, a 60 GHz MICs with flip-chip assembled pseudomorphic-HEMT is demonstrated. With electromagnetic field analysis…
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