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Wafer-scale integration

Known as: WSI, Wafer scale integration 
Wafer-scale integration, WSI for short, is a rarely used system of building very-large integrated circuit networks that use an entire silicon wafer… 
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Related topics

Related topics

11 relations
ElxsiIntegrated circuitList of integrated circuit packaging typesMicroprocessor

Broader (1)

Semiconductor device fabrication

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
A 60 GHz single-chip 256-element wafer-scale phased array with EIRP of 45 dBm using sub-reticle stitching
This paper presents a 60 GHz wafer-scale transmit phased-array with 256-elements spaced λ/2 apart in the x and y directions, and… 
Highly Cited
2005
Highly Cited
2005
Processing Window Queries in Wireless Sensor Networks
The existing query processing techniques for sensor networks rely on a network infrastructure for query propagation and data… 
1989
1989
A wafer scale integration neural network utilizing completely digital circuits
A wafer scale integration (WSI) neural network utilizing completely digital circuits is reported. Three new technologies are used… 
Highly Cited
1989
Highly Cited
1989
Modeling Defect Spatial Distribution
The center-satellite model for describing the distribution of defects on wafers is discussed. This model assigns each defect to a… 
1989
1989
Reconfiguration of VLSI/WSI Mesh Array Processors with Two-Level Redundancy
Reconfiguration schemes for replacing faulty cells (processing elements) with spare cells are introduced for massive parallel… 
Highly Cited
1988
Highly Cited
1988
Approaches for the repair of VLSI/WSI RRAMs by row/column deletion
The authors present two approaches for the repair of large random access memory (RAM) in which redundant rows and columns have… 
Highly Cited
1986
Highly Cited
1986
Yield and performance enhancement through redundancy in VLSI and WSI multiprocessor systems
New challenges have been brought to fault-tolerant computing and processor architecture research because of developments in IC… 
Highly Cited
1985
Highly Cited
1985
A Wafer-Scale Digital Integrator Using Restructurable VSLI
Wafer-scale integration has been demonstrated by fabricating a digital integrator on a monolithic 20-cm/sup 2/ silicon chip, the… 
1979
1979
Adaptive Wafer Scale Integration
Based on an in-situ electrical alterable nonvolatile semiconductor memory, the MNOS transistor, an adaptive interconnect is… 
Highly Cited
1978
Highly Cited
1978
Wafer-scale integration-a fault-tolerant procedure
Considers a new approach to full-slice technology in relation to existing procedures for achieving this goal. Under external… 
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