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List of integrated circuit packaging types
Known as:
IC package
, Chip package
, PAC
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Occasionally specially-processed integrated circuit dies are prepared for direct connections to a substrate without an intermediate header or carrier…
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Related topics
Related topics
30 relations
Ball grid array
Chip carrier
Dual in-line package
Flatpack (electronics)
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
JUNCTION TEMPERATURES MEASUREMENTS IN SEMCONDUCTOR CHIP PACKAGE TECHNOLOGY FIELD OF THE INVENTION
2017
Corpus ID: 157062111
A need exists in the art for a method of generating junction temperatures for multiple-chip packages that takes into account the…
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2016
2016
Fabrication method of etched surface acoustic filter chip package structure
Xin-Fu Liang
,
Jiang-Hua Zhang
2016
Corpus ID: 140455126
The invention relates to a fabrication method of an etched surface acoustic filter chip package structure. The method comprises…
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2016
2016
Mechanical Devices for Aligning Optical Fibers Using Elastic Metal Deformation Techniques
J. V. van Zantvoort
,
S. Plukker
,
P. Kuindersma
,
K. Mekonnen
,
H. de Waardt
IEEE Transactions on Components, Packaging, and…
2016
Corpus ID: 23303547
We designed and realized two different mechanical devices for aligning standard lensed telecom fibers to indium-phosphide-based…
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2015
2015
THERMAL AND THERMOMECHANICAL ANALYSIS AND TESTING OF ELECTRONIC PACKAGING SYSTEMS
G. Clatterbaugh
,
H. K. Charles
2015
Corpus ID: 39587
A comprehensive thermal and mechanical modeling and experimentation program in advanced packaging has led to the systematic…
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2014
2014
MEMS ACCELAROMETER SYSTEM FOR TREMOR ANALYSIS
Y. Kumar
,
A. Prasad
2014
Corpus ID: 30130815
Micro fabricated accelerometer sensors have been developed to measure acceleration in a variety of applications, including…
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Review
2010
Review
2010
Advanced PI / SI / EMI Simulation Technology for High-Speed Electronic Design-Toward chip / package / board co-design-Hideki Asai Shizuoka
H. Asai
2010
Corpus ID: 42799818
With the progress of system integration technology, a variety of noise problems, so-called power/signal integrity and EMI issues…
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2008
2008
A 9-bit Quadrature Direct Digital Synthesizer Implemented in 0 . 18-� m SiGe BiCMOS Technology
Xue-Feng Yu
,
F. Dai
,
J. Irwin
,
R. Jaeger
2008
Corpus ID: 8269279
This paper describes a 9-bit 6.2-GHz low power quadrature direct digital synthesizer (DDS) implemented in a 0.18m SiGe BiCMOS…
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2003
2003
Reduced chip package and process for its preparation
J. Yoon
,
Y. Choi
,
S. Bae
2003
Corpus ID: 64730411
It is disclosed a reduced chip package and a method for producing the reduced chip package. The reduced chip package includes a…
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1989
1989
Circuit chip package for protecting against electromagnetic interference, electrostatic discharge, and thermal and mechanical stresses.
C. Barker
,
R. Casabona
,
D. M. Fenwick
1989
Corpus ID: 146795301
1986
1986
Digital electronic engine controls and leadless chip carriers
Robert J. Hammond
1986
Corpus ID: 107855074