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Virtex (FPGA)
Known as:
Virtex
, Virtex 7
Virtex is the flagship family of FPGA products developed by Xilinx. Other current product lines include Kintex (mid-range) and Artix (low-cost), each…
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Related topics
Related topics
16 relations
CompactRIO
DEFLATE
Hardware description language
Logic block
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Broader (1)
Reconfigurable computing
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2012
Highly Cited
2012
Pushing the Limits of High-Speed GF(2 m ) Elliptic Curve Scalar Multiplication on FPGAs
C. Rebeiro
,
S. Roy
,
Debdeep Mukhopadhyay
Workshop on Cryptographic Hardware and Embedded…
2012
Corpus ID: 14332624
In this paper we present an FPGA implementation of a high-speed elliptic curve scalar multiplier for binary finite fields. High…
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2010
2010
Comprehensive Comparison of Hardware Performance of Fourteen Round 2 SHA-3 Candidates with 512-bit Outputs Using Field Programmable Gate Arrays
K. Gaj
,
Ekawat Homsirikamol
2010
Corpus ID: 15595525
In this paper, we extend our evaluation of the hardware performance of 14 Round 2 SHA-3 candidates, accepted for the presentation…
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2008
2008
Partial Reconfiguration Bitstream Compression for Virtex FPGAs
Haiyun Gu
,
Shurong Chen
International Congress on Image and Signal…
2008
Corpus ID: 40109914
An adaptive LZW algorithm for compressing partial bitstreams of Virtex FPGAs was presented. The adaptations of algorithm were…
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Highly Cited
2006
Highly Cited
2006
Virtex II FPGA Bitstream Manipulation: Application to Reconfiguration Control Systems
Y. Krasteva
,
E. D. L. Torre
,
T. Riesgo
,
D. Joly
International Conference on Field-Programmable…
2006
Corpus ID: 18468648
This paper presents a tool for Virtex II (Pro) FPGA partial bitstream manipulation suited for reconfigurable control systems with…
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Highly Cited
2005
Highly Cited
2005
REPLICA: a bitstream manipulation filter for module relocation in partial reconfigurable systems
Heiko Kalte
,
Gareth Lee
,
Mario Porrmann
,
U. Rückert
IEEE International Parallel and Distributed…
2005
Corpus ID: 18979639
The feature of partial reconfiguration provided by currently available field programmable gate arrays (FPGAs) makes it possible…
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Highly Cited
2002
Highly Cited
2002
Hyperspectral image compression on reconfigurable platforms
T. W. Fry
,
S. Hauck
Proceedings. 10th Annual IEEE Symposium on Field…
2002
Corpus ID: 339711
In this paper we present an implementation of the image compression routine SPIHT in reconfigurable logic. A discussion on why…
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2001
2001
High-Speed DES and Triple DES Encryptor/Decryptor
Vikram Pasham
,
S. Trimberger
2001
Corpus ID: 61662731
Summary The future of network security depends on encryption provided in the crucial building blocks, like switches, routers…
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2000
2000
A Hardware Implementation of an Embryonic Architecture Using Virtex FPGAs
Cesar Ortega
,
A. Tyrell
2000
Corpus ID: 195594738
This paper presents a new version of the MUXTREE embryonic cell suitable for implementation in a commercial Virtex® FPGA from…
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2000
2000
A Hardware Implementation of an Embryonic Architecture Using Virtex FPGAs
C. Ortega-Sanchez
,
A. Tyrrell
International Conference on Evolvable Systems
2000
Corpus ID: 15090087
This paper presents a new version of the MUXTREE embryonic cell suitable for implementation in a commercial Virtex® FPGA from…
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1999
1999
Reconfigurable Multiplier for Virtex FPGA Family
Juri Põldre
,
Kalle Tammemäe
International Conference on Field-Programmable…
1999
Corpus ID: 206727281
This paper describes integer multiplier design optimizations for FPGA technology. The changes in partial product generator…
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