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Logic block

In computing, a logic block or configurable logic block (CLB) is a fundamental building block of field-programmable gate array (FPGA) technology… (More)
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Topic mentions per year

Topic mentions per year

1996-2016
01219962016

Related topics

Related topics

17 relations
Clock skewConventional PCICrossbar switchDelay-locked loop
(More)

Related mentions per year

Related mentions per year

1955-2018
1960198020002020
Logic block
Field-programmable gate array
Logic gate
Lookup table
Multiplexer
Reconfigurable computing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Logic block and design methodology for via-configurable structured ASIC using dual supply voltages
This paper presents a via-configurable logic block and a design methodology for realizing fine-grained dual-supply-voltage… (More)
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2013
2013
A Novel BIST based Diagnosis Technique to Detect Faults in FPGA
  • Ms. N. Ramya, Ms. N. Kirthika
  • 2013
Testing is considered as the major factor for many applications because of the high level fault detection and the fast hardware… (More)
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2012
2012
An Analysis on Spin Wave Logic and CMOS Interface
Spin wave devices can be used to build generic logic functions. Their low-power property offers competitive potential in future… (More)
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2010
2010
A Functional Networks-Type-2 Fuzzy Logic Hybrid Model for the Prediction of Porosity and Permeability of Oil and Gas Reservoirs
A hybrid computational intelligence model, integrating the least-squares fitting algorithm of Functional Networks with Type-2… (More)
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2010
2010
A fusion of Functional Networks and Type-2 Fuzzy Logic for the characterization of oil and gas reservoirs
This paper presents a hybrid model consisting of a fusion of Functional Networks and Type-2 Fuzzy Logic. The model capitalizes on… (More)
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2007
2007
Study of High Speed Current Excitation Reverse Engineering Methodology Using Measured Voltage and PDN Impedance Profile from a Running Microprocessor
Traditionally, power integrity engineer uses simulated transient current profile, icc(t) from the Circuit Designer as input to… (More)
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2005
2005
A new FPGA packing algorithm based on the modeling method for logic block
Logic block packing is a necessary procedure of synthesis in FPGA CAD flow. In academic field, the existent packing algorithm… (More)
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2005
2005
Logic block clustering of large designs for channel-width constrained FPGAs
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs… (More)
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1997
1997
Test Pattern and Test Configuration Generation Methodology for the Logic of RAM-Based FPGA
The test of the Conjigurable Logic Blocks of RAM based FPGAs under a Stuck-At fault model has been studied. The high cost of… (More)
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Review
1996
Review
1996
A Method for Generating Random Circuits and Its Application to Routability Measurement
Routability Measurement Joel Darnauer and Wayne Wei-ming Dai Computer Engineering, UC Santa Cruz Santa Cruz, CA 95064 (joel,dai… (More)
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