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Reconfigurable computing

Known as: Reconfigurable system, Data Path Unit, Adaptive computing 
Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing… 
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Related topics

Related topics

46 relations
Application-specific integrated circuitArithmetic logic unitBenchmark (computing)C-One

Broader (1)

Digital electronics

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Scan pattern retargeting and merging with reduced access time
Efficient access to on-chip instrumentation is a key enabler for post-silicon validation, debug, bringup or diagnosis… 
Highly Cited
2012
Highly Cited
2012
Modeling, verification and pattern generation for reconfigurable scan networks
Reconfigurable scan architectures allow flexible integration and efficient access to infrastructure in SoCs, e.g. for test… 
2011
2011
i-Core: A run-time adaptive processor for embedded multi-core systems
We present the i-Core (Invasive Core), an Application Specific Instruction Set Processor (ASIP) with a run-time adaptive… 
2009
2009
Reconfigurable middleware for high availability sensor systems
In this paper we consider the problem of sharing data collected by sensors worldwide amongst different applications. We focus on… 
2008
2008
Integrating software agents and IEC 61499 realtime control for reconfigurable distributed manufacturing systems
The need for agility in manufacturing systems is continuously growing. This is caused by increasing complexity and decreasing… 
2007
2007
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux
Dynamically reconfigurable hardware allows for implementing systems that can be adapted at run-time according to the needs of the… 
2007
2007
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAs
The ability of partial reconfiguration of today's FPGAs allows the exchange of dynamic system components at runtime, which… 
2006
2006
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications… 
2005
2005
Adaptive accommodation of failures in second-order flight control actuators with measurable rates
In this paper effective failure detection, identification and reconfiguration (FDIR) algorithms are developed for a class of… 
2003
2003
Analysis of the Performance of Coarse-Grain Reconfigurable Architectures with Different Processing Element Configurations
Several coarse-grain reconfigurable architectures have been proposed in recent years that consist of a large number of processing… 
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